qi-hardware/iris
1
0
Fork 0
mirror of git://projects.qi-hardware.com/iris.git synced 2025-01-17 07:01:05 +02:00
Code

working on things

Browse Source
This commit is contained in:
Bas Wijnen 2009-06-10 22:54:12 +02:00
parent 1bb67efc75
commit 8445be58dd
11 changed files with 160 additions and 360 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.gitignore vendored
View File

@ -5,5 +5,5 @@ uimage
*.o *.o
*.cc *.cc
*.hh *.hh
thread0 keyboard
thread1 lcd

6
Makefile
View File

@ -21,7 +21,6 @@ CPPFLAGS = -O5 -fno-inline $(ARCH_CPPFLAGS)
CC = $(CROSS)gcc CC = $(CROSS)gcc
LD = $(CROSS)ld LD = $(CROSS)ld
OBJCOPY = $(CROSS)objcopy OBJCOPY = $(CROSS)objcopy
STRIP = : $(CROSS)strip
headers = kernel.hh iris.h $(arch_headers) headers = kernel.hh iris.h $(arch_headers)
kernel_sources = panic.cc data.cc alloc.cc invoke.cc schedule.cc $(arch_kernel_sources) kernel_sources = panic.cc data.cc alloc.cc invoke.cc schedule.cc $(arch_kernel_sources)
@ -44,9 +43,8 @@ PYPP = /usr/bin/pypp
$(CC) $(CPPFLAGS) $(TARGET_FLAGS) $(CXXFLAGS) -c $< -o $@ $(CC) $(CPPFLAGS) $(TARGET_FLAGS) $(CXXFLAGS) -c $< -o $@
%: boot-programs/init.o boot-programs/%.o %: boot-programs/init.o boot-programs/%.o
$(LD) $^ -o $@ $(LD) $(filter %.o,$^) -o $@
$(STRIP) $@ #$(OBJCOPY) -S $(OBJCOPYFLAGS) $@
$(OBJCOPY) -S $(OBJCOPYFLAGS) $@
clean: clean:
rm -f *.o boot-programs/*.o kernel kernel.raw kernel.raw.gz $(BUILT_SOURCES) $(ARCH_CLEAN_FILES) rm -f *.o boot-programs/*.o kernel kernel.raw kernel.raw.gz $(BUILT_SOURCES) $(ARCH_CLEAN_FILES)

76
boot-programs/jz4730.hhp
View File

@ -1,8 +1,11 @@
#pypp 0
#ifndef __JZ4730_HH__ #ifndef __JZ4730_HH__
#define __JZ4730_HH__ #define __JZ4730_HH__
#include <iris.h> #include <iris.h>
#define JZ_EXTAL 3686400
// Base addresses are the place where the pages are mapped. // Base addresses are the place where the pages are mapped.
#define HARB_BASE 0x00000000 #define HARB_BASE 0x00000000
#define EMC_BASE 0x00001000 #define EMC_BASE 0x00001000
@ -115,6 +118,10 @@ static void __map_io (unsigned physical, unsigned mapping):
#define map_uprt() do { __map_io (UPRT_PHYSICAL, UPRT_BASE); } while (0) #define map_uprt() do { __map_io (UPRT_PHYSICAL, UPRT_BASE); } while (0)
#define map_kbc() do { __map_io (KBC_PHYSICAL, KBC_BASE); } while (0) #define map_kbc() do { __map_io (KBC_PHYSICAL, KBC_BASE); } while (0)
#define REG8(x) (*(volatile unsigned char *)(x))
#define REG16(x) (*(volatile unsigned short *)(x))
#define REG32(x) (*(volatile unsigned *)(x))
/************************************************************************* /*************************************************************************
* MSC * MSC
*************************************************************************/ *************************************************************************/
@ -2255,6 +2262,14 @@ static void __map_io (unsigned physical, unsigned mapping):
//################### operations ###################################### //################### operations ######################################
static __inline__ void udelay (unsigned us):
for unsigned i = 0; i < us; ++i:
for unsigned k = 0; k < 100; ++k:
GPIO_GPDR (0) = GPIO_GPDR (0)
static __inline__ void mdelay (unsigned ms):
udelay (1000 * ms)
/*************************************************************************** /***************************************************************************
* MSC * MSC
***************************************************************************/ ***************************************************************************/
@ -2343,18 +2358,18 @@ static void __map_io (unsigned physical, unsigned mapping):
static __inline__ unsigned msc_calc_clk_divisor (bool is_sd, unsigned dev_clk, unsigned msc_clk): static __inline__ unsigned msc_calc_clk_divisor (bool is_sd, unsigned dev_clk, unsigned msc_clk):
unsigned rate, ret unsigned rate, ret
rate = is_sd ? SD_CLK : MMC_CLK rate = is_sd ? SD_CLK : MMC_CLK
if (msc_clk && msc_clk < dev_clk) if msc_clk && msc_clk < dev_clk:
dev_clk = msc_clk dev_clk = msc_clk
for ret = 0; dev_clk < rate; ++ret, rate >>= 1: for ret = 0; dev_clk < rate; ++ret, rate >>= 1:
return ret return ret
return 0 return 0
/* divide rate to little than or equal to 400kHz */ /* divide rate to little than or equal to 400kHz */
static __inline__ unsigned msc_calc_slow_clk_divisor (bool is_s): static __inline__ unsigned msc_calc_slow_clk_divisor (bool is_sd):
unsigned rate, ret unsigned rate, ret
rate = (is_sd ? SD_CLK : MMC_CLK) / 1000 / 400 rate = (is_sd ? SD_CLK : MMC_CLK) / 1000 / 400
for ret = 0; rate > 0; rate >>= 1, ++ret: for ret = 0; rate > 0; rate >>= 1, ++ret:
return ret return ret
/*************************************************************************** /***************************************************************************
* RTC * RTC
@ -2763,7 +2778,7 @@ static __inline__ void gpio_as_uart3 ():
static __inline__ void gpio_as_uart2 (): static __inline__ void gpio_as_uart2 ():
GPIO_GPALR (3) = (GPIO_GPALR (3) & 0x3FFFFFFF) | 0x40000000 GPIO_GPALR (3) = (GPIO_GPALR (3) & 0x3FFFFFFF) | 0x40000000
GPIO_GPAUR (3) = (PIO_GPAUR (3) & 0xF3FFFFFF) | 0x04000000 GPIO_GPAUR (3) = (GPIO_GPAUR (3) & 0xF3FFFFFF) | 0x04000000
static __inline__ void gpio_as_uart1 (): static __inline__ void gpio_as_uart1 ():
GPIO_GPAUR (0) = (GPIO_GPAUR (0) & 0xFFF0FFFF) | 0x00050000 GPIO_GPAUR (0) = (GPIO_GPAUR (0) & 0xFFF0FFFF) | 0x00050000
@ -2784,7 +2799,7 @@ static __inline__ void gpio_as_scc ():
static __inline__ void gpio_as_dma (): static __inline__ void gpio_as_dma ():
GPIO_GPALR (0) = (GPIO_GPALR (0) & 0x00FFFFFF) | 0x55000000 GPIO_GPALR (0) = (GPIO_GPALR (0) & 0x00FFFFFF) | 0x55000000
GPIO_GPAUR (0) = (PIO_GPAUR (0) & 0xFF0FFFFF) | 0x00500000 GPIO_GPAUR (0) = (GPIO_GPAUR (0) & 0xFF0FFFFF) | 0x00500000
static __inline__ void gpio_as_msc (): static __inline__ void gpio_as_msc ():
GPIO_GPALR (1) = (GPIO_GPALR (1) & 0xFFFF000F) | 0x00005550 GPIO_GPALR (1) = (GPIO_GPALR (1) & 0xFFFF000F) | 0x00005550
@ -2794,15 +2809,15 @@ static __inline__ void gpio_as_pcmcia ():
static __inline__ void gpio_as_emc (): static __inline__ void gpio_as_emc ():
GPIO_GPALR (2) = (GPIO_GPALR (2) & 0x3FFFFFFF) | 0x40000000 GPIO_GPALR (2) = (GPIO_GPALR (2) & 0x3FFFFFFF) | 0x40000000
GPIO_GPAUR (2) = (PIO_GPAUR (2) & 0xFFFF0000) | 0x00005555 GPIO_GPAUR (2) = (GPIO_GPAUR (2) & 0xFFFF0000) | 0x00005555
static __inline__ void gpio_as_lcd_slave (): static __inline__ void gpio_as_lcd_slave ():
GPIO_GPALR (1) = (GPIO_GPALR (1) & 0x0000FFFF) | 0x55550000 GPIO_GPALR (1) = (GPIO_GPALR (1) & 0x0000FFFF) | 0x55550000
GPIO_GPAUR (1) = (PIO_GPAUR (1) & 0x00000000) | 0x55555555 GPIO_GPAUR (1) = (GPIO_GPAUR (1) & 0x00000000) | 0x55555555
static __inline__ void gpio_as_lcd_master (): static __inline__ void gpio_as_lcd_master ():
GPIO_GPALR (1) = (GPIO_GPALR (1) & 0x0000FFFF) | 0x55550000 GPIO_GPALR (1) = (GPIO_GPALR (1) & 0x0000FFFF) | 0x55550000
GPIO_GPAUR (1) = (PIO_GPAUR (1) & 0x00000000) | 0x556A5555 GPIO_GPAUR (1) = (GPIO_GPAUR (1) & 0x00000000) | 0x556A5555
static __inline__ void gpio_as_usb (): static __inline__ void gpio_as_usb ():
GPIO_GPAUR (0) = (GPIO_GPAUR (0) & 0x00FFFFFF) | 0x55000000 GPIO_GPAUR (0) = (GPIO_GPAUR (0) & 0x00FFFFFF) | 0x55000000
@ -2827,7 +2842,7 @@ static __inline__ void gpio_as_ps2 ():
static __inline__ void gpio_as_uprt (): static __inline__ void gpio_as_uprt ():
GPIO_GPALR (1) = (GPIO_GPALR (1) & 0x0000000F) | 0x55555550 GPIO_GPALR (1) = (GPIO_GPALR (1) & 0x0000000F) | 0x55555550
GPIO_GPALR (3) = (PIO_GPALR (3) & 0xC0000000) | 0x15555555 GPIO_GPALR (3) = (GPIO_GPALR (3) & 0xC0000000) | 0x15555555
static __inline__ void gpio_as_cim (): static __inline__ void gpio_as_cim ():
GPIO_GPALR (0) = (GPIO_GPALR (0) & 0xFF000000) | 0x00555555 GPIO_GPALR (0) = (GPIO_GPALR (0) & 0xFF000000) | 0x00555555
@ -3184,7 +3199,7 @@ static __inline__ void udc_ep5info_init (unsigned c, unsigned i, unsigned a, uns
UDC_EP5InfR &= ~UDC_EPInfR_EPT_MASK UDC_EP5InfR &= ~UDC_EPInfR_EPT_MASK
UDC_EP5InfR |= UDC_EPInfR_EPT_BULK UDC_EP5InfR |= UDC_EPInfR_EPT_BULK
UDC_EP5InfR &= ~UDC_EPInfR_EPD UDC_EP5InfR &= ~UDC_EPInfR_EPD
UDC_EP5InfR |= UDC_EPInfR_EPD_OU; UDC_EP5InfR |= UDC_EPInfR_EPD_OUT
UDC_EP5InfR &= ~UDC_EPInfR_EPN_MASK UDC_EP5InfR &= ~UDC_EPInfR_EPN_MASK
UDC_EP5InfR |= (5 << UDC_EPInfR_EPN_BIT) UDC_EP5InfR |= (5 << UDC_EPInfR_EPN_BIT)
@ -3200,7 +3215,7 @@ static __inline__ void udc_ep6info_init (unsigned c, unsigned i, unsigned a, uns
UDC_EP6InfR &= ~UDC_EPInfR_EPT_MASK UDC_EP6InfR &= ~UDC_EPInfR_EPT_MASK
UDC_EP6InfR |= UDC_EPInfR_EPT_BULK UDC_EP6InfR |= UDC_EPInfR_EPT_BULK
UDC_EP6InfR &= ~UDC_EPInfR_EPD UDC_EP6InfR &= ~UDC_EPInfR_EPD
UDC_EP6InfR |= UDC_EPInfR_EPD_OU; UDC_EP6InfR |= UDC_EPInfR_EPD_OUT
UDC_EP6InfR &= ~UDC_EPInfR_EPN_MASK UDC_EP6InfR &= ~UDC_EPInfR_EPN_MASK
UDC_EP6InfR |= (6 << UDC_EPInfR_EPN_BIT) UDC_EP6InfR |= (6 << UDC_EPInfR_EPN_BIT)
@ -3216,7 +3231,7 @@ static __inline__ void udc_ep7info_init (unsigned c, unsigned i, unsigned a, uns
UDC_EP7InfR &= ~UDC_EPInfR_EPT_MASK UDC_EP7InfR &= ~UDC_EPInfR_EPT_MASK
UDC_EP7InfR |= UDC_EPInfR_EPT_ISO UDC_EP7InfR |= UDC_EPInfR_EPT_ISO
UDC_EP7InfR &= ~UDC_EPInfR_EPD UDC_EP7InfR &= ~UDC_EPInfR_EPD
UDC_EP7InfR |= UDC_EPInfR_EPD_OU; UDC_EP7InfR |= UDC_EPInfR_EPD_OUT
UDC_EP7InfR &= ~UDC_EPInfR_EPN_MASK UDC_EP7InfR &= ~UDC_EPInfR_EPN_MASK
UDC_EP7InfR |= (7 << UDC_EPInfR_EPN_BIT) UDC_EP7InfR |= (7 << UDC_EPInfR_EPN_BIT)
@ -3385,11 +3400,11 @@ static __inline__ void ac97_cold_reset_codec ():
AIC_ACCR2 &= ~AIC_ACCR2_SR AIC_ACCR2 &= ~AIC_ACCR2_SR
AIC_ACCR2 &= ~AIC_ACCR2_SA AIC_ACCR2 &= ~AIC_ACCR2_SA
#else #else
static __inline__ ac97_cold_reset_codec (): static __inline__ void ac97_cold_reset_codec ():
//gpio_as_output(70); /* SDATA_OUT */ //gpio_as_output(70); /* SDATA_OUT */
//gpio_as_output(71); /* SDATA_IN */ //gpio_as_output(71); /* SDATA_IN */
//gpio_as_output(78); /* SYNC */ //gpio_as_output(78); /* SYNC */
//gpio_as_output(69); /* RESET# */ //gpio_as_output(69); /* RESET# */
GPIO_GPDIR (2) |= 0x000040e0 GPIO_GPDIR (2) |= 0x000040e0
GPIO_GPDR (2) &= ~0x000040e0 GPIO_GPDR (2) &= ~0x000040e0
udelay (10) udelay (10)
@ -3700,6 +3715,18 @@ static __inline__ void i2s_reset_codec ():
/*************************************************************************** /***************************************************************************
* CPM * CPM
***************************************************************************/ ***************************************************************************/
static __inline__ unsigned int get_pllout ():
unsigned plcr = CPM_PLCR1
if plcr & CPM_PLCR1_PLL1EN:
unsigned nf, nr, no
unsigned od[4] = {1, 2, 2, 4}
nf = (plcr & CPM_PLCR1_PLL1FD_MASK) >> CPM_PLCR1_PLL1FD_BIT
nr = (plcr & CPM_PLCR1_PLL1RD_MASK) >> CPM_PLCR1_PLL1RD_BIT
no = od[((plcr & CPM_PLCR1_PLL1OD_MASK) >> CPM_PLCR1_PLL1OD_BIT)]
return (JZ_EXTAL) / ((nr+2) * no) * (nf+2)
else:
return JZ_EXTAL
#define cpm_plcr1_fd() ((CPM_PLCR1 & CPM_PLCR1_PLL1FD_MASK) >> CPM_PLCR1_PLL1FD_BIT) #define cpm_plcr1_fd() ((CPM_PLCR1 & CPM_PLCR1_PLL1FD_MASK) >> CPM_PLCR1_PLL1FD_BIT)
#define cpm_plcr1_rd() ((CPM_PLCR1 & CPM_PLCR1_PLL1RD_MASK) >> CPM_PLCR1_PLL1RD_BIT) #define cpm_plcr1_rd() ((CPM_PLCR1 & CPM_PLCR1_PLL1RD_MASK) >> CPM_PLCR1_PLL1RD_BIT)
#define cpm_plcr1_od() ((CPM_PLCR1 & CPM_PLCR1_PLL1OD_MASK) >> CPM_PLCR1_PLL1OD_BIT) #define cpm_plcr1_od() ((CPM_PLCR1 & CPM_PLCR1_PLL1OD_MASK) >> CPM_PLCR1_PLL1OD_BIT)
@ -3708,15 +3735,12 @@ static __inline__ void i2s_reset_codec ():
#define cpm_cfcr_sfr() ((CPM_CFCR & CPM_CFCR_SFR_MASK) >> CPM_CFCR_SFR_BIT) #define cpm_cfcr_sfr() ((CPM_CFCR & CPM_CFCR_SFR_MASK) >> CPM_CFCR_SFR_BIT)
#define cpm_cfcr_ifr() ((CPM_CFCR & CPM_CFCR_IFR_MASK) >> CPM_CFCR_IFR_BIT) #define cpm_cfcr_ifr() ((CPM_CFCR & CPM_CFCR_IFR_MASK) >> CPM_CFCR_IFR_BIT)
static __inline__ unsigned int cpm_divisor_encode(unsigned int n) static __inline__ unsigned int cpm_divisor_encode (unsigned int n):
{ unsigned encode[10] = {1,2,3,4,6,8,12,16,24,32}
unsigned int encode[10] = {1,2,3,4,6,8,12,16,24,32}; for unsigned i = 0; i < 10; ++i:
int i; if n < encode[i]:
for (i=0;i<10;i++) return i
if (n < encode[i]) return 10
break;
return i;
}
#define cpm_set_mclk_div(n) ( CPM_CFCR = (CPM_CFCR & ~CPM_CFCR_MFR_MASK) | ((n) << (CPM_CFCR_MFR_BIT)) ) #define cpm_set_mclk_div(n) ( CPM_CFCR = (CPM_CFCR & ~CPM_CFCR_MFR_MASK) | ((n) << (CPM_CFCR_MFR_BIT)) )

95
boot-programs/keyboard.ccp
View File

@ -16,79 +16,40 @@
// You should have received a copy of the GNU General Public License // You should have received a copy of the GNU General Public License
// along with this program. If not, see <http://www.gnu.org/licenses/>. // along with this program. If not, see <http://www.gnu.org/licenses/>.
#include "iris.h" #include <iris.h>
#include "devices.hh"
#include "jz4730.hh"
// GPIO pins for the keyboard:// // GPIO pins for the keyboard://
// Rows = 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 125 // Rows = 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 125
// Cols = 0, 1, 2, 3, 4, 5, 6, 7 // Cols = 0, 1, 2, 3, 4, 5, 6, 7
// Rows: 60...6f; 7d
// Nicely aligned to a port: use rows as output; cols as input.
// Map memory from b0010000, which is really 10010000 in kseg1.
#define D(n) (*(volatile unsigned *)(0x00 + 0x30 * n + address))
#define DI(n) (*(volatile unsigned *)(0x04 + 0x30 * n + address))
#define PU(n) (*(volatile unsigned *)(0x0c + 0x30 * n + address))
#define AL(n) (*(volatile unsigned *)(0x10 + 0x30 * n + address))
#define AU(n) (*(volatile unsigned *)(0x14 + 0x30 * n + address))
#define IE(n) (*(volatile unsigned *)(0x20 + 0x30 * n + address))
unsigned const address = 0x00010000
static void event (bool release, unsigned row, unsigned col): static void event (bool release, unsigned row, unsigned col):
debug_set_led (col * 2 + (release ? 1 : 0)) kdebug (col * 2 + (release ? 1 : 0))
static void delay (): #define ROW_MASK 0x2000ffff
for unsigned i = 0; i < 100000; ++i: #define COL_MASK 0x000000ff
IE (3) &= ~0x2000ffff
int main (): int main ():
// map memory map_gpio ()
Capability page = memory_create_page (__my_memory)
alloc_physical (page, 0x10010000, 0)
memory_map (__my_memory, page, address, 1)
#if 0
// Keyboard stuff doesn't seem to work. Try the simpler part: touchpad buttons.
IE (0) &= ~0x00012000
AL (0) &= ~0x0c000000
AU (0) &= ~0x00000003
DI (0) &= ~0x00012000
PU (0) &= ~0x00012000
unsigned old = 0
while true:
unsigned data = D (0) & 0x00012000
if data == old:
continue
if data & ~old & 0x00010000:
event (true, 0, 0)
else if ~data & old & 0x00010000:
event (false, 0, 0)
if data & ~old & 0x00002000:
event (true, 1, 1)
else if ~data & old & 0x00002000:
event (false, 1, 1)
old = data
#else
// Disable all interrupts. // Disable all interrupts.
IE (3) &= ~0x2000ffff GPIO_GPIER (3) &= ~ROW_MASK
IE (0) &= ~0x000001ff GPIO_GPIER (0) &= ~COL_MASK
// Set all to GPIO. // Set all to GPIO.
AL (3) = 0 GPIO_GPALR (3) = 0
AU (3) &= ~0x0c000000 GPIO_GPAUR (3) &= ~0x0c000000
AL (0) &= ~0x0003ffff GPIO_GPALR (0) &= ~0x0003ffff
// Set all rows to input and enable the pull-ups. // Set all rows to input and enable the pull-ups.
DI (0) &= ~0x000000ff GPIO_GPDIR (0) &= ~COL_MASK
PU (0) |= 0x000000ff GPIO_GPPUR (0) |= COL_MASK
// Set all columns to output, 0. // Set all columns to input and enable the pull-ups; set to 0 when output.
DI (3) |= 0x2000ffff GPIO_GPDIR (3) &= ROW_MASK
D (3) &= ~0x2000ffff GPIO_GPPUR (3) |= ROW_MASK
GPIO_GPDR (3) &= ~ROW_MASK
#define NUM_COLS 17 #define NUM_COLS 17
unsigned keys[NUM_COLS] unsigned keys[NUM_COLS]
@ -101,18 +62,12 @@ int main ():
// read keyboard // read keyboard
unsigned data[NUM_COLS] unsigned data[NUM_COLS]
for unsigned col = 0; col < NUM_COLS; ++col: for unsigned col = 0; col < NUM_COLS; ++col:
D (3) &= ~0x2000ffff GPIO_GPDIR (3) = (GPIO_GPDIR (3) & ~ROW_MASK) | 1 << cols[col]
delay () udelay (100)
unsigned zero = ~D (0) & 0x000000ff unsigned data = GPIO_GPDR (0) & COL_MASK
D (3) = (D (3) & ~0x2000ffff) | (1 << cols[col]) // Generate events.
delay ()
data[col] = D (0) & zero
// Generate events.
for unsigned col = 0; col < NUM_COLS; ++col:
for unsigned row = 0; row < 8; ++row: for unsigned row = 0; row < 8; ++row:
if (data[col] ^ keys[col]) & (1 << row): if (data ^ keys[col]) & (1 << row):
event (data[col] & (1 << row), row, col) event (data & (1 << row), row, col)
keys[col] = data[col] keys[col] = data
schedule () schedule ()
#endif

235
boot-programs/lcd.ccp
View File

@ -16,46 +16,9 @@
// You should have received a copy of the GNU General Public License // You should have received a copy of the GNU General Public License
// along with this program. If not, see <http://www.gnu.org/licenses/>. // along with this program. If not, see <http://www.gnu.org/licenses/>.
#include "iris.h" #include <iris.h>
#include "jz4730.hh"
// gpio stuff #include "devices.hh"
#define D(n) (*(volatile unsigned *)(0x00 + 0x30 * n + gpio_address))
#define DI(n) (*(volatile unsigned *)(0x04 + 0x30 * n + gpio_address))
#define PU(n) (*(volatile unsigned *)(0x0c + 0x30 * n + gpio_address))
#define AL(n) (*(volatile unsigned *)(0x10 + 0x30 * n + gpio_address))
#define AU(n) (*(volatile unsigned *)(0x14 + 0x30 * n + gpio_address))
#define IE(n) (*(volatile unsigned *)(0x20 + 0x30 * n + gpio_address))
// pwm stuff
#define CTR (*(volatile unsigned char *)(pwm_address + 0x00))
#define PER (*(volatile unsigned short *)(pwm_address + 0x04))
#define DUT (*(volatile unsigned short *)(pwm_address + 0x08))
#define CPM_MSCR (*(volatile unsigned *)(cpm_address + 0x20))
// Mapping address for I/O memory.
unsigned const gpio_address = 0x00001000
unsigned const pwm_address = 0x00002000
unsigned const lcd_address = 0x00003000
unsigned const cpm_address = 0x00004000
//#define PWM0_BASE 0xB0050000
//#define PWM1_BASE 0xB0051000
/* PWM Control Register (PWM_CTR) */
//#define PWM_CTR_EN (1 << 7)
//#define PWM_CTR_SD (1 << 6)
//#define PWM_CTR_PRESCALE_MASK 0x3f
/* PWM Period Register (PWM_PER) */
//#define PWM_PER_PERIOD_MASK 0x3ff
/* PWM Duty Register (PWM_DUT) */
//#define PWM_DUT_FDUTY (1 << 10)
//#define PWM_DUT_DUTY_MASK 0x3ff
// Pin definitions, all in port 2. // Pin definitions, all in port 2.
#define PWM_ENABLE (1 << 30) #define PWM_ENABLE (1 << 30)
@ -64,177 +27,41 @@ unsigned const cpm_address = 0x00004000
#define SPDA (1 << 2) //LCD_PS #define SPDA (1 << 2) //LCD_PS
#define LCD_RET (1 << 3) //LCD_REV //use for lcd reset #define LCD_RET (1 << 3) //LCD_REV //use for lcd reset
// Lcd register definitions.
#define LCD_CFG (*(volatile unsigned *)(lcd_address + 0x00))
#define LCD_VSYNC (*(volatile unsigned *)(lcd_address + 0x04))
#define LCD_HSYNC (*(volatile unsigned *)(lcd_address + 0x08))
#define LCD_VAT (*(volatile unsigned *)(lcd_address + 0x0c))
#define LCD_DAH (*(volatile unsigned *)(lcd_address + 0x10))
#define LCD_DAV (*(volatile unsigned *)(lcd_address + 0x14))
#define LCD_PS (*(volatile unsigned *)(lcd_address + 0x18))
#define LCD_CLS (*(volatile unsigned *)(lcd_address + 0x1c))
#define LCD_SPL (*(volatile unsigned *)(lcd_address + 0x20))
#define LCD_REV (*(volatile unsigned *)(lcd_address + 0x24))
#define LCD_CTRL (*(volatile unsigned *)(lcd_address + 0x30))
#define LCD_STATE (*(volatile unsigned *)(lcd_address + 0x34))
#define LCD_IID (*(volatile unsigned *)(lcd_address + 0x38))
#define LCD_DA0 (*(volatile unsigned *)(lcd_address + 0x40))
#define LCD_SA0 (*(volatile unsigned *)(lcd_address + 0x44))
#define LCD_FID0 (*(volatile unsigned *)(lcd_address + 0x48))
#define LCD_CMD0 (*(volatile unsigned *)(lcd_address + 0x4c))
#define LCD_DA1 (*(volatile unsigned *)(lcd_address + 0x50))
#define LCD_SA1 (*(volatile unsigned *)(lcd_address + 0x54))
#define LCD_FID1 (*(volatile unsigned *)(lcd_address + 0x58))
#define LCD_CMD1 (*(volatile unsigned *)(lcd_address + 0x5c))
// Bit definitions.
#define LCD_CFG_PDW_BIT 4
#define LCD_CFG_PDW_MASK (0x03 << LCD_DEV_PDW_BIT)
#define LCD_CFG_PDW_1 (0 << LCD_DEV_PDW_BIT)
#define LCD_CFG_PDW_2 (1 << LCD_DEV_PDW_BIT)
#define LCD_CFG_PDW_4 (2 << LCD_DEV_PDW_BIT)
#define LCD_CFG_PDW_8 (3 << LCD_DEV_PDW_BIT)
#define LCD_CFG_MODE_BIT 0
#define LCD_CFG_MODE_MASK (0x0f << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_GENERIC_TFT (0 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_SHARP_HR (1 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_CASIO_TFT (2 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_SAMSUNG_ALPHA (3 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_NONINTER_CCIR656 (4 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_INTER_CCIR656 (5 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_SINGLE_CSTN (8 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_SINGLE_MSTN (9 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_DUAL_CSTN (10 << LCD_DEV_MODE_BIT)
#define LCD_CFG_MODE_DUAL_MSTN (11 << LCD_DEV_MODE_BIT)
#define LCD_VSYNC_VPS_BIT 16
#define LCD_VSYNC_VPS_MASK (0xffff << LCD_VSYNC_VPS_BIT)
#define LCD_VSYNC_VPE_BIT 0
#define LCD_VSYNC_VPE_MASK (0xffff << LCD_VSYNC_VPS_BIT)
#define LCD_HSYNC_HPS_BIT 16
#define LCD_HSYNC_HPS_MASK (0xffff << LCD_HSYNC_HPS_BIT)
#define LCD_HSYNC_HPE_BIT 0
#define LCD_HSYNC_HPE_MASK (0xffff << LCD_HSYNC_HPE_BIT)
#define LCD_VAT_HT_BIT 16
#define LCD_VAT_HT_MASK (0xffff << LCD_VAT_HT_BIT)
#define LCD_VAT_VT_BIT 0
#define LCD_VAT_VT_MASK (0xffff << LCD_VAT_VT_BIT)
#define LCD_DAH_HDS_BIT 16
#define LCD_DAH_HDS_MASK (0xffff << LCD_DAH_HDS_BIT)
#define LCD_DAH_HDE_BIT 0
#define LCD_DAH_HDE_MASK (0xffff << LCD_DAH_HDE_BIT)
#define LCD_DAV_VDS_BIT 16
#define LCD_DAV_VDS_MASK (0xffff << LCD_DAV_VDS_BIT)
#define LCD_DAV_VDE_BIT 0
#define LCD_DAV_VDE_MASK (0xffff << LCD_DAV_VDE_BIT)
#define LCD_CTRL_BST_BIT 28
#define LCD_CTRL_BST_MASK (0x03 << LCD_CTRL_BST_BIT)
#define LCD_CTRL_BST_4 (0 << LCD_CTRL_BST_BIT)
#define LCD_CTRL_BST_8 (1 << LCD_CTRL_BST_BIT)
#define LCD_CTRL_BST_16 (2 << LCD_CTRL_BST_BIT)
#define LCD_CTRL_RGB555 (1 << 27)
#define LCD_CTRL_OFUP (1 << 26)
#define LCD_CTRL_FRC_BIT 24
#define LCD_CTRL_FRC_MASK (0x03 << LCD_CTRL_FRC_BIT)
#define LCD_CTRL_FRC_16 (0 << LCD_CTRL_FRC_BIT)
#define LCD_CTRL_FRC_4 (1 << LCD_CTRL_FRC_BIT)
#define LCD_CTRL_FRC_2 (2 << LCD_CTRL_FRC_BIT)
#define LCD_CTRL_PDD_BIT 16
#define LCD_CTRL_PDD_MASK (0xff << LCD_CTRL_PDD_BIT)
#define LCD_CTRL_EOFM (1 << 13)
#define LCD_CTRL_SOFM (1 << 12)
#define LCD_CTRL_OFUM (1 << 11)
#define LCD_CTRL_IFUM0 (1 << 10)
#define LCD_CTRL_IFUM1 (1 << 9)
#define LCD_CTRL_LDDM (1 << 8)
#define LCD_CTRL_QDM (1 << 7)
#define LCD_CTRL_BEDN (1 << 6)
#define LCD_CTRL_PEDN (1 << 5)
#define LCD_CTRL_DIS (1 << 4)
#define LCD_CTRL_ENA (1 << 3)
#define LCD_CTRL_BPP_BIT 0
#define LCD_CTRL_BPP_MASK (0x07 << LCD_CTRL_BPP_BIT)
#define LCD_CTRL_BPP_1 (0 << LCD_CTRL_BPP_BIT)
#define LCD_CTRL_BPP_2 (1 << LCD_CTRL_BPP_BIT)
#define LCD_CTRL_BPP_4 (2 << LCD_CTRL_BPP_BIT)
#define LCD_CTRL_BPP_8 (3 << LCD_CTRL_BPP_BIT)
#define LCD_CTRL_BPP_16 (4 << LCD_CTRL_BPP_BIT)
#define LCD_STATE_QD (1 << 7)
#define LCD_STATE_EOF (1 << 5)
#define LCD_STATE_SOF (1 << 4)
#define LCD_STATE_OFU (1 << 3)
#define LCD_STATE_IFU0 (1 << 2)
#define LCD_STATE_IFU1 (1 << 1)
#define LCD_STATE_LDD (1 << 0)
#define LCD_CMD_SOFINT (1 << 31)
#define LCD_CMD_EOFINT (1 << 30)
#define LCD_CMD_PAL (1 << 28)
#define LCD_CMD_LEN_BIT 0
#define LCD_CMD_LEN_MASK (0xffffff << LCD_CMD_LEN_BIT)
static void udelay (unsigned us):
for unsigned i = 0; i < us; ++i:
for unsigned k = 0; k < 100; ++k:
IE (2) &= ~SPEN
static void mdelay (unsigned ms):
udelay (1000 * ms)
static unsigned int get_pllout ():
unsigned plcr = CPM_PLCR1
if (plcr & CPM_PLCR1_PLL1EN)
unsigned nf, nr, no
unsigned od[4] = {1, 2, 2, 4}
nf = (plcr & CPM_PLCR1_PLL1FD_MASK) >> CPM_PLCR1_PLL1FD_BIT
nr = (plcr & CPM_PLCR1_PLL1RD_MASK) >> CPM_PLCR1_PLL1RD_BIT
no = od[((plcr & CPM_PLCR1_PLL1OD_MASK) >> CPM_PLCR1_PLL1OD_BIT)]
return (JZ_EXTAL) / ((nr+2) * no) * (nf+2)
else
return JZ_EXTAL
// level is in the range [0, 300] // level is in the range [0, 300]
static void set_backlight (unsigned level): static void set_backlight (unsigned level):
DUT = level PWM_DUT (0) = level
if level: if level:
CTR = 0xbf PWM_CTR (0) = 0xbf
D (2) |= PWM_ENABLE GPIO_GPDR (2) |= PWM_ENABLE
else: else:
CTR = 0x3f PWM_CTR (0) = 0x3f
D (2) &= ~PWM_ENABLE GPIO_GPDR (2) &= ~PWM_ENABLE
// Write to a register. Value must be in range [0, 0xff]. // Write to a register. Value must be in range [0, 0xff].
static void write_reg (unsigned reg, unsigned value): static void write_reg (unsigned reg, unsigned value):
unsigned data = (reg << 0xa) | 0x200 | value unsigned data = (reg << 0xa) | 0x200 | value
D (2) |= SPEN GPIO_GPDR (2) |= SPEN
D (2) = (D (2) & ~SPDA) | SPCK GPIO_GPDR (2) = (GPIO_GPDR (2) & ~SPDA) | SPCK
D (2) &= ~SPEN GPIO_GPDR (2) &= ~SPEN
udelay(25) udelay(25)
for unsigned i = 0; i < 16; ++i: for unsigned i = 0; i < 16; ++i:
D (2) &= ~SPCK GPIO_GPDR (2) &= ~SPCK
if data & 0x8000: if data & 0x8000:
D (2) |= SPDA GPIO_GPDR (2) |= SPDA
else: else:
D (2) &= ~SPDA GPIO_GPDR (2) &= ~SPDA
udelay (25) udelay (25)
D (2) |= SPCK GPIO_GPDR (2) |= SPCK
udelay (25) udelay (25)
data <<= 1 data <<= 1
D (2) |= SPEN GPIO_GPDR (2) |= SPEN
udelay(200) udelay(200)
static void lcd_enable (): static void lcd_enable ():
udelay (50) udelay (50)
D (2) &= ~LCD_RET GPIO_GPDR (2) &= ~LCD_RET
mdelay(150) mdelay(150)
D (2) |= LCD_RET GPIO_GPDR (2) |= LCD_RET
mdelay(10) mdelay(10)
// These values have been copied from the linux source. // These values have been copied from the linux source.
// I have no idea what they do. // I have no idea what they do.
@ -259,18 +86,18 @@ static void lcd_disable ():
static void reset (): static void reset ():
// Use gpio pins as pwm. // Use gpio pins as pwm.
AUR (2) = (AUR (2) & ~0x0fffffff) | 0x50000000 GPIO_GPAUR (2) = (GPIO_GPAUR (2) & ~0x0fffffff) | 0x50000000
// Use gpio pins as lcd master. // Use gpio pins as lcd master.
ALR (1) = (ALR (1) & ~0x0000ffff) | 0x55550000 GPIO_GPALR (1) = (GPIO_GPALR (1) & ~0x0000ffff) | 0x55550000
AUR (1) = 0x556a5555 GPIO_GPAUR (1) = 0x556a5555
// initialize things. // initialize things.
IE(2) &= ~(PWM_ENABLE | LCD_RET | SPEN | SPCK | SPDA) GPIO_GPIER (2) &= ~(PWM_ENABLE | LCD_RET | SPEN | SPCK | SPDA)
DI(2) |= PWM_ENABLE | LCD_RET | SPEN | SPCK | SPDA GPIO_GPDIR (2) |= PWM_ENABLE | LCD_RET | SPEN | SPCK | SPDA
udelay (50) udelay (50)
D (2) &= ~LCD_RET GPIO_GPDR (2) &= ~LCD_RET
mdelay (150) mdelay (150)
D (2) |= LCD_RET GPIO_GPDR (2) |= LCD_RET
mdelay (10) mdelay (10)
lcd_enable () lcd_enable ()
@ -282,7 +109,7 @@ static void reset ():
LCD_DAV = (20 << 16) | 500 LCD_DAV = (20 << 16) | 500
LCD_DAH = (80 << 16) | 880 LCD_DAH = (80 << 16) | 880
LCD_VAT = (880 << 16) | 500 LCD_VAT = (880 << 16) | 500
LCD_CFG = MODE_TFT_GEN | PCLK_N | VSYNC_N //LCD_CFG = MODE_TFT_GEN | PCLK_N | VSYNC_N
// Stop lcd. // Stop lcd.
CPM_MSCR |= 1 << 7 CPM_MSCR |= 1 << 7
@ -306,10 +133,10 @@ static void map_io (unsigned physical, unsigned address):
//drop (page) //drop (page)
int main (): int main ():
map_io (0x10010000, gpio_address) map_gpio ()
map_io (0x10050000, pwm_address) map_pwm0 ()
map_io (0x13050000, lcd_address) map_lcd ()
map_io (0x10000000, cpm_address) map_cpm ()
reset () reset ()
@ -319,7 +146,7 @@ int main ():
continue continue
switch msg.protected_data: switch msg.protected_data:
case LCD_BACKLIGHT: case LCD_BACKLIGHT:
set_backlight (c.data[0] > 300 ? 300 : c.data[0]) set_backlight (msg.data[0] > 300 ? 300 : msg.data[0])
break break
case LCD_RESET: case LCD_RESET:
reset () reset ()

87
invoke.ccp
View File

@ -46,36 +46,31 @@ bool Receiver::try_deliver ():
break break
if !m: if !m:
return false return false
Capability *c[4] Capability::Context c
for unsigned i = 0; i < 4; ++i: for unsigned i = 0; i < 4; ++i:
if !m->capabilities[i]: if m->capabilities[i]:
c[i] = NULL c.cap[i] = owner->address_space->clone_capability (m->capabilities[i], true)
else: if !c.cap[i]:
c[i] = owner->address_space->clone_capability (m->capabilities[i], true)
if !c[i]:
for unsigned j = 0; j < i; ++j: for unsigned j = 0; j < i; ++j:
owner->address_space->free_capability (c[i]) owner->address_space->free_capability (c.cap[i])
return false return false
Thread_arch_receive (owner, m->data, c) Thread_arch_receive (owner, m->protected_data, &c)
owner->unwait () owner->unwait ()
return true return true
bool Receiver::send_message (unsigned protected_data, unsigned data[4], Capability *cap[4], bool copy[4]): bool Receiver::send_message (unsigned protected_data, Capability::Context *c):
bool tried_direct = false bool tried_direct = false
if owner && owner->is_waiting () && (protected_data == reply_protected_data || !protected_only): if owner && owner->is_waiting () && (protected_data == reply_protected_data || !protected_only):
Capability *c[4]
for unsigned i = 0; i < 4; ++i: for unsigned i = 0; i < 4; ++i:
if !cap[i]: if c->cap[i]:
c[i] = NULL c->cap[i] = owner->address_space->clone_capability (c->cap[i], c->copy[i])
else: if !c->cap[i]:
c[i] = owner->address_space->clone_capability (cap[i], copy[i])
if !c[i]:
for unsigned j = 0; j < i; ++j: for unsigned j = 0; j < i; ++j:
owner->address_space->free_capability (c[i]) owner->address_space->free_capability (c->cap[i])
tried_direct = true tried_direct = true
break break
if !tried_direct: if !tried_direct:
Thread_arch_receive (owner, data, c) Thread_arch_receive (owner, protected_data, c)
owner->unwait () owner->unwait ()
return true return true
// The owner was not waiting, or it was not possible to deliver the message. Put it in the queue. // The owner was not waiting, or it was not possible to deliver the message. Put it in the queue.
@ -83,11 +78,11 @@ bool Receiver::send_message (unsigned protected_data, unsigned data[4], Capabili
if !msg: if !msg:
return false return false
for unsigned i = 0; i < 4; ++i: for unsigned i = 0; i < 4; ++i:
msg->data[i] = data[i] msg->data[i] = c->data[i]
if !cap[i]: if !c->cap[i]:
msg->capabilities[i] = NULL msg->capabilities[i] = NULL
else: else:
msg->capabilities[i] = address_space->clone_capability (cap[i], copy[i]) msg->capabilities[i] = address_space->clone_capability (c->cap[i], c->copy[i])
if !msg->capabilities[i]: if !msg->capabilities[i]:
for unsigned j = 0; j < i; ++j: for unsigned j = 0; j < i; ++j:
address_space->free_capability (msg->capabilities[j]) address_space->free_capability (msg->capabilities[j])
@ -628,52 +623,52 @@ static void page_invoke (unsigned target, unsigned protected_data, Capability::C
if !p: if !p:
new_flags &= ~PAGE_FLAG_FRAME new_flags &= ~PAGE_FLAG_FRAME
// If we can get the new frame, get it. // If we can get the new frame, get it.
Capability *c = &((Capability *)cappage->data.frame)[data[1]] Capability *cap = &((Capability *)cappage->data.frame)[c->data[1]]
c->invalidate () cap->invalidate ()
// clone_capability needs a Memory, but doesn't use it when storage is provided. // clone_capability needs a Memory, but doesn't use it when storage is provided.
top_memory.clone_capability (cap, copy, c) top_memory.clone_capability (c->cap[0], c->copy[0], cap)
break break
default: default:
break break
static void capability_invoke (unsigned target, unsigned protected_data, Capability *cap, unsigned request, unsigned data): static void capability_invoke (unsigned target, unsigned protected_data, Capability::Context *c):
Capability *capability = (Capability *)protected_data Capability *capability = (Capability *)protected_data
switch request: switch c->data[0]:
case CAP_CAPABILITY_GET: case CAP_CAPABILITY_GET:
reply_cap (capability, true) reply_cap (capability, true)
break break
default: default:
break break
static bool kernel_invoke (unsigned target, unsigned protected_data, unsigned d[4], Capability *c[4], bool copy[4], Capability *self): static bool kernel_invoke (unsigned target, unsigned protected_data, Capability::Context *c, Capability *self):
// Kernel calling convention: // Kernel calling convention:
// data[0] is the request. // data[0] is the request.
// cap[0] is the reply capability // cap[0] is the reply capability
// other parameters' meanings depend on the operation. // other parameters' meanings depend on the operation.
if !((1 << d[0]) & target & ~REQUEST_MASK): if !((1 << c->data[0]) & target & ~REQUEST_MASK):
// You are not allowed to perform this operation. // You are not allowed to perform this operation.
return true return true
if (target & (CAPTYPE_MASK | (1 << CAP_RECEIVER_CALL))) == (CAPTYPE_RECEIVER | (1 << CAP_RECEIVER_CALL)): if (target & (CAPTYPE_MASK | (1 << CAP_RECEIVER_CALL))) == (CAPTYPE_RECEIVER | (1 << CAP_RECEIVER_CALL)):
// This is a call capability. // This is a call capability.
reply_receiver = (Receiver *)protected_data reply_receiver = (Receiver *)protected_data
reply_receiver->protected_only = !(target & (1 << CAP_RECEIVER_CALL_ASYNC)) reply_receiver->protected_only = !(target & (1 << CAP_RECEIVER_CALL_ASYNC))
Capability r Capability *c0 = c->cap[0]
Capability *c0 = c[0]
if ~(unsigned)c0->target & ~KERNEL_MASK: if ~(unsigned)c0->target & ~KERNEL_MASK:
Capability r
fill_cap (&r, protected_data, reply_receiver->reply_protected_data) fill_cap (&r, protected_data, reply_receiver->reply_protected_data)
c[0] = &r c->cap[0] = &r
copy[0] = true c->copy[0] = true
bool ret = kernel_invoke ((unsigned)c0->target, c0->protected_data, d, c, copy, c0) bool ret = kernel_invoke ((unsigned)c0->target, c0->protected_data, c, c0)
r.invalidate () r.invalidate ()
return ret return ret
else: else:
// Kernel call: don't create actual capablities. // Kernel call: don't create actual capablities.
reply = NULL reply = NULL
return kernel_invoke ((unsigned)c0->target, c0->protected_data, d, c, copy, c0) return kernel_invoke ((unsigned)c0->target, c0->protected_data, c, c0)
if (target & (CAPTYPE_MASK | (1 << CAP_RECEIVER_REPLY))) == (CAPTYPE_RECEIVER | (1 << CAP_RECEIVER_REPLY)): if (target & (CAPTYPE_MASK | (1 << CAP_RECEIVER_REPLY))) == (CAPTYPE_RECEIVER | (1 << CAP_RECEIVER_REPLY)):
// This is a reply capability. // This is a reply capability.
Receiver *r = (Receiver *)protected_data Receiver *r = (Receiver *)protected_data
r->send_message (r->reply_protected_data, d, c, copy) r->send_message (r->reply_protected_data, c)
while self->parent: while self->parent:
self = self->parent self = self->parent
while self->sibling_prev: while self->sibling_prev:
@ -682,36 +677,36 @@ static bool kernel_invoke (unsigned target, unsigned protected_data, unsigned d[
self->sibling_next->invalidate () self->sibling_next->invalidate ()
self->invalidate () self->invalidate ()
return true return true
reply = c[0] reply = c->cap[0]
if d[0] == CAP_DEGRADE: if c->data[0] == CAP_DEGRADE:
reply_cap (target & d[1], protected_data) reply_cap (target & c->data[1], protected_data)
return true return true
switch target & CAPTYPE_MASK: switch target & CAPTYPE_MASK:
case CAPTYPE_RECEIVER: case CAPTYPE_RECEIVER:
receiver_invoke (target, protected_data, c[1], d) receiver_invoke (target, protected_data, c)
break break
case CAPTYPE_MEMORY: case CAPTYPE_MEMORY:
memory_invoke (target, protected_data, c[1], d[0], d[1]) memory_invoke (target, protected_data, c)
break break
case CAPTYPE_THREAD: case CAPTYPE_THREAD:
thread_invoke (target, protected_data, c[1], d) thread_invoke (target, protected_data, c)
break break
case CAPTYPE_PAGE: case CAPTYPE_PAGE:
page_invoke (target, protected_data, c[1], copy[1], d) page_invoke (target, protected_data, c)
break break
case CAPTYPE_CAPABILITY: case CAPTYPE_CAPABILITY:
capability_invoke (target, protected_data, c[1], d[0], d[1]) capability_invoke (target, protected_data, c)
break break
case CAPTYPE_CAPPAGE: case CAPTYPE_CAPPAGE:
page_invoke (target, protected_data, c[1], copy[1], d) page_invoke (target, protected_data, c)
break break
default: default:
panic (0x99337744, "invalid capability type invoked") panic (0x99337744, "invalid capability type invoked")
return true return true
bool Capability::invoke (unsigned data[4], Capability *cap[4], bool copy[4]): bool Capability::invoke (Capability::Context *c):
if (unsigned)target & ~KERNEL_MASK: if (unsigned)target & ~KERNEL_MASK:
// This is not a kernel capability: send a message to the receiver. // This is not a kernel capability: send a message to the receiver.
return target->send_message (protected_data, data, cap, copy) return target->send_message (protected_data, c)
// This is a kernel capability. Use a function to allow optimized call capabilities. // This is a kernel capability. Use a function to allow optimized call capabilities.
return kernel_invoke ((unsigned)target, protected_data, data, cap, copy, this) return kernel_invoke ((unsigned)target, protected_data, c, this)

6
iris.h
View File

@ -181,7 +181,7 @@ static int wait (Message *msg)
: "=m"(ret) : "=m"(ret)
: "m"(msg) : "m"(msg)
: "memory", "v0", "v1", "t0", "t1", "t2", "t3", "a0", "a1", "a2", "a3"); : "memory", "v0", "v1", "t0", "t1", "t2", "t3", "a0", "a1", "a2", "a3");
return ret return ret;
} }
static int call (Capability target, Message *msg) static int call (Capability target, Message *msg)
@ -346,9 +346,9 @@ static Capability degrade (Capability src, unsigned mask)
return call_c02 (src, CAP_DEGRADE, mask); return call_c02 (src, CAP_DEGRADE, mask);
} }
static void debug_set_led (unsigned leds) static void kdebug (unsigned code)
{ {
invoke_02 (__my_thread, CAP_THREAD_DEBUG, leds); invoke_02 (__my_thread, CAP_THREAD_DEBUG, code);
} }
static void schedule () static void schedule ()

2
kernel.hhp
View File

@ -198,7 +198,7 @@ void raw_pfree (unsigned page)
// Defined by architecture-specific files. // Defined by architecture-specific files.
void Thread_arch_init (Thread *thread) void Thread_arch_init (Thread *thread)
void Thread_arch_receive (Thread *thread, Capability::Context *c) void Thread_arch_receive (Thread *thread, unsigned protected_data, Capability::Context *c)
void Thread_arch_receive_fail (Thread *thread) void Thread_arch_receive_fail (Thread *thread)
unsigned *Thread_arch_info (Thread *thread, unsigned num) unsigned *Thread_arch_info (Thread *thread, unsigned num)
void Memory_arch_init (Memory *mem) void Memory_arch_init (Memory *mem)

1
mips/Makefile.arch
View File

@ -35,6 +35,7 @@ uimage:
mips/entry.o: $(boot_threads) mips/entry.o: $(boot_threads)
mips/init.o: TARGET_FLAGS = -I/usr/include mips/init.o: TARGET_FLAGS = -I/usr/include
$(boot_threads): TARGET_FLAGS = -I. $(boot_threads): TARGET_FLAGS = -I.
$(boot_threads): boot-programs/jz4730.hh
# Transform ':' into ';' so vim doesn't think there are errors. # Transform ':' into ';' so vim doesn't think there are errors.
uimage: kernel.raw.gz Makefile mips/Makefile.arch uimage: kernel.raw.gz Makefile mips/Makefile.arch

4
mips/arch.ccp
View File

@ -45,7 +45,7 @@ void Thread_arch_init (Thread *thread):
thread->arch.k0 = 0 thread->arch.k0 = 0
thread->arch.k1 = 0 thread->arch.k1 = 0
void Thread_arch_receive (Thread *thread, Capability::Context *c): void Thread_arch_receive (Thread *thread, unsigned protected_data, Capability::Context *c):
thread->arch.a0 = (unsigned)c->cap[0] thread->arch.a0 = (unsigned)c->cap[0]
thread->arch.a1 = (unsigned)c->cap[1] thread->arch.a1 = (unsigned)c->cap[1]
thread->arch.a2 = (unsigned)c->cap[2] thread->arch.a2 = (unsigned)c->cap[2]
@ -54,7 +54,7 @@ void Thread_arch_receive (Thread *thread, Capability::Context *c):
thread->arch.t1 = c->data[1] thread->arch.t1 = c->data[1]
thread->arch.t2 = c->data[2] thread->arch.t2 = c->data[2]
thread->arch.t3 = c->data[3] thread->arch.t3 = c->data[3]
thread->arch.v1 = c->protected_data thread->arch.v1 = protected_data
thread->arch.v0 = 1 thread->arch.v0 = 1
void Thread_arch_receive_fail (Thread *thread): void Thread_arch_receive_fail (Thread *thread):

4
mips/entry.S
View File

@ -222,8 +222,8 @@ save_regs:
.globl thread2 .globl thread2
.balign 0x1000 .balign 0x1000
thread0: thread0:
.incbin "thread0" .incbin "keyboard"
.balign 0x1000 .balign 0x1000
thread1: thread1:
.incbin "thread1" .incbin "lcd"
thread2: thread2: