mirror of
git://projects.qi-hardware.com/iris.git
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working lcd driver
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cf496f031f
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85948735ab
@ -28,8 +28,7 @@ class DevBuzzer:
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DevBuzzer ():
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is_beeping = false
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tcu_stop_counter (pwm)
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//tcu_select_extalclk (pwm)
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tcu_select_pclk (pwm)
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tcu_select_extalclk (pwm)
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tcu_select_clk_div64 (pwm)
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tcu_enable_pwm_output (pwm)
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void stop ():
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@ -121,7 +121,7 @@ static void reset ():
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#elif defined (NANONOTE)
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// Note that the sync pulse is part of the pre-display region.
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// Horizontal timings.
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unsigned hsync = 1, hpre = 141, hpost = 273
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unsigned hsync = 1, hpre = 70, hpost = 273
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// Vertical timings.
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unsigned vsync = 1, vpre = 21, vpost = 2
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// 3 clocks per pixel.
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@ -129,7 +129,7 @@ static void reset ():
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// Bits per pixel.
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unsigned bpp = LCD_CTRL_BPP_18_24
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// Configuration.
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unsigned cfg = LCD_CFG_MODE_SERIAL_TFT | LCD_CFG_HSP | LCD_CFG_VSP
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unsigned cfg = LCD_CFG_MODE_SERIAL_TFT | LCD_CFG_HSP | LCD_CFG_VSP | LCD_CFG_PCP
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// Set up SPI pins.
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gpio_as_output (SP_PORT, (1 << SPEN) | (1 << SPCK) | (1 << SPDA))
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gpio_set (SP_PORT, (1 << SPEN) | (1 << SPCK))
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@ -139,7 +139,7 @@ static void reset ():
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// Note that the sync pulse is part of the pre-display region.
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unsigned vpe = vsync, vds = vpre, vde = vds + v, vt = vde + vpost
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unsigned hpe = hsync, hds = hpre, hde = hds + cpp * h, ht = hde + hpost
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unsigned hpe = hsync, hds = hpre, hde = hds + h, ht = hde + hpost
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cpm_stop_lcd ()
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@ -156,17 +156,11 @@ static void reset ():
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CPM_CFCR |= CPM_CFCR_UPE
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#elif defined (NANONOTE)
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unsigned val = cpm_get_pllout2 () / pixclock - 1
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kdebug ("clock: ")
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kdebug_num (val)
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kdebug ("\n")
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//assert (val < 0x400)
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//cpm_set_pixdiv (val)
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//cpm_set_pixdiv (12)
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val = cpm_get_pllout2 () / (pixclock * 3) - 1
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kdebug ("clock: ")
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kdebug_num (val)
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kdebug ("\n")
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assert (val < 0x20)
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//cpm_set_ldiv (val)
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// Update dividers.
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@ -179,7 +173,7 @@ static void reset ():
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#ifdef NANONOTE
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// Reset the controller.
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//write_reg (BACKLIGHT1, 0x1e)
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write_reg (BACKLIGHT1, 0x1e)
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// Enable display.
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write_reg (BACKLIGHT1, 0x5f)
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// Set data to rgbrgbrgb input, with a delta color filter.
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@ -252,6 +246,15 @@ enum captype:
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#endif
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SET_EOF_CB
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static unsigned spot (unsigned x, unsigned y, unsigned cx, unsigned cy):
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unsigned dx2 = (x - cx) * (x - cx)
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unsigned dy2 = (y - cy) * (y - cy)
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unsigned d2 = dx2 + dy2
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unsigned l = 120
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if d2 >= l * l:
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return 0
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return ((l * l - d2 - 1) << 8) / (l * l)
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Kernel::Num start ():
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map_lcd ()
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map_cpm ()
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@ -265,21 +268,18 @@ Kernel::Num start ():
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assert (physical & PAGE_MASK && ~physical)
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for unsigned i = 0; i < pages; ++i:
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Kernel::Page p = Kernel::my_memory.create_page ()
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p.alloc_physical (physical + i * PAGE_SIZE, false, true)
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Kernel::my_memory.map (p, (unsigned)LCD_FRAMEBUFFER_BASE + i * PAGE_SIZE)
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p.alloc_physical (physical + (i << PAGE_BITS), false, true)
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Kernel::my_memory.map (p, (unsigned)LCD_FRAMEBUFFER_BASE + (i << PAGE_BITS))
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Kernel::free_cap (p)
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for unsigned y = 0; y < v; ++y:
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unsigned g = (y << 8) / v
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for unsigned x = 0; x < h; ++x:
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unsigned r = (x << 8) / h
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unsigned b = ((x + y) << 8) / (h + v)
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unsigned r = spot (x, y, 100, 160)
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unsigned g = spot (x, y, 160, 60)
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unsigned b = spot (x, y, 220, 160)
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#if defined (TRENDTAC)
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LCD_FRAMEBUFFER_BASE[y * h + x] = ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3)
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#elif defined (NANONOTE)
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LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 3] = 0
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LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 2] = r
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LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 1] = g
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LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 0] = b
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LCD_FRAMEBUFFER_BASE[y * h + x] = (r << 16) | (g << 8) | b
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#else
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#error "Define your framebuffer format."
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#endif
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@ -739,7 +739,6 @@ static void caps_invoke (unsigned cmd, unsigned target, Kernel::Num protected_da
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if c->data[1].l >= caps->size:
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dpanic (0, "invalid caps for print")
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return
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dbg_code.h = (unsigned)caps->cap (c->data[1].l)
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kCapRef cap (caps, c->data[1].l)
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kCapRef orig (caps, c->data[1].l)
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while cap->parent.valid ():
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2
iris.hhp
2
iris.hhp
@ -487,7 +487,7 @@ namespace Kernel:
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my_thread.call (CAP_MASTER_DIRECT | Thread::DBG_SEND, Num (code, bits))
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inline void reboot ():
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my_thread.call (CAP_MASTER_DIRECT | Thread::PRIV_REBOOT)
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inline void kernel_panic (unsigned code):
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inline void panic (unsigned code):
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my_thread.call (CAP_MASTER_DIRECT | Thread::PRIV_PANIC, code)
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void Receiver::sleep (unsigned value):
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21
memory.ccp
21
memory.ccp
@ -4,6 +4,7 @@
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extern unsigned _end
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static void clear_page (unsigned page, unsigned num = 1):
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page = (page & ~0xc0000000) | 0xa0000000
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for unsigned i = 0; i < (num << (PAGE_BITS - 2)); ++i:
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((unsigned *)page)[i] = 0
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if *((unsigned *)page) != 0 || ((unsigned *)page)[(num << (PAGE_BITS - 2)) - 1] != 0:
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@ -51,6 +52,11 @@ unsigned init_memory (unsigned mem):
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first_free->prev = NULL
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first_free->next = NULL
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first_free->num = ((mem & PAGE_MASK) - ((unsigned)first_free & ~0xc0000000)) >> PAGE_BITS
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//dbg_log ("initial memory: ")
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//dbg_log_num ((unsigned)first_free & ~0xc0000000)
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//dbg_log ("+")
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//dbg_log_num (first_free->num)
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//dbg_log ("\n")
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return first_free->num
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unsigned phys_alloc (unsigned num):
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@ -68,6 +74,11 @@ unsigned phys_alloc (unsigned num):
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if p->next:
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p->next->prev = p->prev
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clear_page ((unsigned)p, num)
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//dbg_log ("allocating ")
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//dbg_log_num ((unsigned)p & ~0xc0000000)
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//dbg_log ("+")
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//dbg_log_num (num << PAGE_BITS)
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//dbg_log ("\n")
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return (unsigned)p
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choice = p
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if !choice:
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@ -77,9 +88,19 @@ unsigned phys_alloc (unsigned num):
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choice->num -= num
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unsigned ret = (unsigned)choice + (choice->num << PAGE_BITS)
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clear_page (ret, num)
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//dbg_log ("allocating ")
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//dbg_log_num (ret & ~0xc0000000)
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//dbg_log ("+")
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//dbg_log_num (num << PAGE_BITS)
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//dbg_log ("\n")
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return ret
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void phys_free (unsigned page, unsigned num):
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//dbg_log ("free ")
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//dbg_log_num (page & ~0xc0000000)
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//dbg_log ("+")
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//dbg_log_num (num)
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//dbg_log ("\n")
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unsigned size = num << PAGE_BITS
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if !first_free || (unsigned)first_free > page:
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// This is the first free block.
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@ -232,7 +232,8 @@ static void init_threads ():
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// Initialize the kernel, finish by falling into the idle task.
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void init (unsigned mem):
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#ifndef NDEBUG
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dbg_code = 0
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// Initialize board-specific things.
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board_init ()
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#endif
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must_wait = false
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// Initialize kernel variables to empty.
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@ -266,8 +267,7 @@ void init (unsigned mem):
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for unsigned i = 0; i < 32; ++i:
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arch_interrupt_receiver[i] = NULL
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// Initialize board-specific things.
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board_init ()
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// Enable timer interrupts.
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intc_unmask_irq (TIMER_INTERRUPT)
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// Say we're handling an exception. Since we're going to enter the idle task, allow access to cp0.
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@ -251,6 +251,7 @@ kThread *exception ():
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break
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case 23:
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// Reference to WatchHi/WatchLo address.
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cp0_set0 (CP0_WATCH_LO)
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current->raise (Kernel::ERR_WATCHPOINT, 0)
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break
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case 24:
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@ -21,28 +21,31 @@
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#include "kernel.hh"
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void board_init ():
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unsigned cpm_uhccdr = CPM_UHCCDR
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unsigned cpm_cpccr = CPM_CPCCR
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unsigned cpm_cppcr = CPM_CPPCR
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pll_init ()
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cpm_stop_all ()
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#ifndef NDEBUG
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cpm_start_uart0 ()
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cpm_start_tcu ()
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cpm_start_lcd ()
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gpio_as_uart0 ()
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#endif
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// Timer interrupts and buzzer.
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cpm_start_tcu ()
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// sdram memory.
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gpio_as_sdram_16bit ()
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// flash memory.
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gpio_as_nand ()
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// sound controller.
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gpio_as_aic ()
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// micro-sd controller.
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gpio_as_msc ()
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// display.
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gpio_as_lcd_16bit ()
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// buzzer.
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gpio_as_pwm4 ()
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// Set up memory.
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setup_sdram ()
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// Use some gpio pins for lcd.
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gpio_as_gpio (2, (1 << 21) | (1 << 22) | (1 << 23))
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gpio_as_gpio (3, 1 << 27)
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gpio_as_output (2, (1 << 21) | (1 << 22) | (1 << 23))
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gpio_as_output (3, 1 << 27)
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// Set up keyboard: this breaks uart receive.
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gpio_as_gpio (3, 0x05fc0000)
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// Set up timed interrupts.
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@ -55,6 +58,7 @@ void board_init ():
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tcu_clear_full_match_flag (0)
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tcu_unmask_full_match_irq (0)
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tcu_start_counter (0)
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#ifndef NDEBUG
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// Set up uart.
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UART0_IER = 0
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UART0_FCR = 0
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@ -68,12 +72,8 @@ void board_init ():
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UART0_DLLR = uart_div
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UART0_LCR = UARTLCR_WLEN_8 | UARTLCR_STOP1
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UART0_FCR = UARTFCR_UUE | UARTFCR_FE | UARTFCR_RFLS | UARTFCR_TFLS
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dbg_code.l = 1
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dbg_log ("Serial port initialized\n")
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dbg_log_num (CPM_CPCCR)
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dbg_log ("+")
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dbg_log_num (CPM_CPPCR)
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dbg_log ("\n")
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#endif
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void arch_reboot ():
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// Wait for serial port to be done.
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@ -102,7 +102,7 @@
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#define ETH_BASE 0x00014000
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// Default lcd framebuffer mapping space.
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#define LCD_FRAMEBUFFER_BASE ((unsigned char *)0x00015000)
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#define LCD_FRAMEBUFFER_BASE ((unsigned *)0x00015000)
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// Map IO memory (requires a priviledged Kernel::my_thread capability).
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#include <iris.hh>
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@ -2347,9 +2347,10 @@ static void gpio_disable_pull (unsigned p, unsigned pins):
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//**************************************************************************
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static void pll_init ():
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// The cpu clock frequency
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//unsigned const cpu_clock = 336000000
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unsigned const cpu_clock = 210000000
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unsigned const pixclock = 27000000
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unsigned const cpu_clock = 336000000
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//unsigned const cpu_clock = 200000000
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//unsigned const pixclock = 13500000
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unsigned const pixclock = 25846153
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// Configure the pll frequency to cpu_clock.
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CPM_CPPCR = ((cpu_clock * 2 / JZ_EXTAL - 2) << CPM_CPPCR_PLLM_BIT) | (0 << CPM_CPPCR_PLLN_BIT) | (0 << CPM_CPPCR_PLLOD_BIT) | (0x20 << CPM_CPPCR_PLLST_BIT) | CPM_CPPCR_PLLEN
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// Set up dividers; see documentation for the meaning of all the values.
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@ -3695,6 +3696,7 @@ static void setup_sdram ():
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EMC_RTCSR = 0x83
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EMC_RTCOR = 0x1f
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#endif
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#if 0
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for unsigned i = 0; i < 5; ++i:
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dbg_log ("memory: ")
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dbg_log_num (EMC_SMCR (i), 8)
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@ -3705,6 +3707,7 @@ static void setup_sdram ():
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dbg_log (",")
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dbg_log_num (EMC_RTCOR, 8)
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dbg_log ("\n")
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#endif
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#endif
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#endif
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