working fat system on sd card

mips/nanonote/Makefile.arch

@@ -16,6 +16,7 @@
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 load = 0x80000000
+UDC_BOOT=1
 
 ARCH_CXXFLAGS = -DNUM_THREADS=2
 ARCH_CPPFLAGS = -I. -Imips -Imips/nanonote -Wa,-mips32 -DNANONOTE -DUSE_SERIAL
@@ -28,8 +29,19 @@ LDFLAGS = --omagic -Ttext $(load)
 arch_iris_sources = mips/interrupts.cc mips/arch.cc
 boot_sources = mips/init.cc mips/nanonote/board.cc
 arch_headers = mips/arch.hh mips/nanonote/jz4740.hh mips/nanonote/board.hh
-boot_threads = bootinit udc
-programs = init gpio lcd bsquare ball buzzer metronome elfrun alarm gui nand sd+mmc
+udc_boot_programs = udc
+sd_boot_programs = sd+mmc partition fat
+standard_boot_programs = bootinit
+ifdef UDC_BOOT
+	boot_threads = $(standard_boot_programs) $(udc_boot_programs)
+	threadlist = mips/nanonote/threadlist-udc
+	INIT_FLAGS = -DUDC_BOOT
+else
+	boot_threads = $(standard_boot_programs) $(sd_boot_programs)
+	threadlist = mips/nanonote/threadlist-sd
+	INIT_FLAGS = -DSD_BOOT
+endif
+programs = init gpio lcd bsquare ball buzzer metronome elfrun alarm gui nand test $(udc_boot_programs) $(sd_boot_programs) $(standard_boot_programs)
 
 all: test
 
@@ -52,17 +64,16 @@ nanonote-boot: mips/nanonote/nanonote-boot.cc mips/nanonote/sdram-setup.raw
 
 mips/nanonote/sdram-setup.elf: mips/nanonote/sdram-setup.ld
 mips/nanonote/sdram-setup.elf: LDFLAGS = --omagic -T mips/nanonote/sdram-setup.ld
-mips/nanonote/threadlist.o: $(addsuffix .elf,$(boot_threads))
+$(threadlist).o: $(addprefix fs/,$(addsuffix .elf,$(boot_threads)))
 mips/boot.o: TARGET_FLAGS = -DMEMORY_SIZE="32 << 20"
-mips/init.o: TARGET_FLAGS = -I/usr/include
-boot-programs/bootinit.o: TARGET_FLAGS = -I/usr/include
+mips/init.o: TARGET_FLAGS = -I/usr/include $(INIT_FLAGS)
+source/bootinit.o: TARGET_FLAGS = -I/usr/include
 source/elfrun.o: TARGET_FLAGS = -I/usr/include
 source/gpio.ccp: source/nanonote-gpio.ccp
 	ln -s $(subst source/,,$<) $@
-$(addsuffix .elf,$(boot_threads)): TARGET_FLAGS = -I.
-$(addsuffix .elf,$(boot_threads)): LDFLAGS = -EL
+$(addprefix fs/,$(addsuffix .elf,$(boot_threads))): TARGET_FLAGS = -I.
+$(addprefix fs/,$(addsuffix .elf,$(boot_threads))): LDFLAGS = -EL
 $(addprefix fs/,$(addsuffix .elf,$(programs))): LDFLAGS = -EL
-$(addprefix boot-programs/,$(addsuffix .cc,$(boot_threads))): devices.hh keys.hh
 source/lcd.o: source/charset.data
 
 source/charset.data: source/charset
@@ -72,7 +83,7 @@ source/charset.data: source/charset
 	$(CC) $(CPPFLAGS) $(TARGET_FLAGS) -DKERNEL_STACK_SIZE=0x2000 -c $< -o $@
 
 # entry.o must be the first file.  threadlist.o must be the first of the init objects (which can be freed after loading).
-iris.elf: mips/entry.o $(subst .cc,.o,$(iris_sources)) mips/nanonote/threadlist.o mips/boot.o $(subst .cc,.o,$(boot_sources))
+iris.elf: mips/entry.o $(subst .cc,.o,$(iris_sources)) $(threadlist).o mips/boot.o $(subst .cc,.o,$(boot_sources))
 	$(LD) $(LDFLAGS) $^ -o $@
 
 server:

mips/nanonote/jz4740.hhp

@@ -163,7 +163,6 @@ void cdelay (unsigned cs):
 #define IRQ_SSI		16
 #define IRQ_CIM		17
 #define IRQ_AIC		18
-#define IRQ_ETH		19
 #define IRQ_DMAC	20
 #define IRQ_TCU2	21
 #define IRQ_TCU1	22
@@ -1227,8 +1226,6 @@ void cdelay (unsigned cs):
 #define	MSC_CMDAT_BUS_WIDTH_MASK	(0x3 << MSC_CMDAT_BUS_WIDTH_BIT)
   #define MSC_CMDAT_BUS_WIDTH_1BIT	  (0x0 << MSC_CMDAT_BUS_WIDTH_BIT) // 1-bit data bus
   #define MSC_CMDAT_BUS_WIDTH_4BIT	  (0x2 << MSC_CMDAT_BUS_WIDTH_BIT) // 4-bit data bus
-  #define CMDAT_BUS_WIDTH1	  (0x0 << MSC_CMDAT_BUS_WIDTH_BIT)
-  #define CMDAT_BUS_WIDTH4	  (0x2 << MSC_CMDAT_BUS_WIDTH_BIT)
 #define	MSC_CMDAT_DMA_EN		(1 << 8)
 #define	MSC_CMDAT_INIT			(1 << 7)
 #define	MSC_CMDAT_BUSY			(1 << 6)
@@ -1245,13 +1242,14 @@ void cdelay (unsigned cs):
   #define MSC_CMDAT_RESPONSE_R4	  (0x4 << MSC_CMDAT_RESPONSE_BIT) // Format R4
   #define MSC_CMDAT_RESPONSE_R5	  (0x5 << MSC_CMDAT_RESPONSE_BIT) // Format R5
   #define MSC_CMDAT_RESPONSE_R6	  (0x6 << MSC_CMDAT_RESPONSE_BIT) // Format R6
+  #define MSC_CMDAT_RESPONSE_R7	  (0x7 << MSC_CMDAT_RESPONSE_BIT) // Format R7
 
-#define	CMDAT_DMA_EN	(1 << 8)
-#define	CMDAT_INIT	(1 << 7)
-#define	CMDAT_BUSY	(1 << 6)
-#define	CMDAT_STREAM	(1 << 5)
-#define	CMDAT_WRITE	(1 << 4)
-#define	CMDAT_DATA_EN	(1 << 3)
+#define	MSC_CMDAT_DMA_EN	(1 << 8)
+#define	MSC_CMDAT_INIT		(1 << 7)
+#define	MSC_CMDAT_BUSY		(1 << 6)
+#define	MSC_CMDAT_STREAM	(1 << 5)
+#define	MSC_CMDAT_WRITE		(1 << 4)
+#define	MSC_CMDAT_DATA_EN	(1 << 3)
 
 // MSC Interrupts Mask Register (MSC_IMASK)
 

mips/nanonote/server/usb-server.ccp

@@ -156,7 +156,7 @@ void data::poll ():
 				if !--lock:
 					dir.clear ()
 				continue
-			case Iris::String::GET_PAGE:
+			case Iris::String::GET_BLOCK:
 				if buffer[1] >= dir.size ():
 					std::cerr << "reading invalid file" << std::endl
 					usb_release_interface (handle, 0)

mips/nanonote/threadlist-sd.S

@@ -0,0 +1,49 @@
+// Iris: micro-kernel for a capability-based operating system.
+// mips/nanonote/threadlist.S: List of initial threads.
+// Copyright 2009 Bas Wijnen <wijnen@debian.org>
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+	.globl init_start
+	.globl thread_start
+	.set noreorder
+
+	.balign 0x1000
+thread0:
+	.incbin "fs/bootinit.elf"
+
+	.balign 0x1000
+thread1:
+	.incbin "fs/sd+mmc.elf"
+
+	.balign 0x1000
+thread2:
+	.incbin "fs/partition.elf"
+
+	.balign 0x1000
+thread3:
+	.incbin "fs/fat.elf"
+
+	.balign 0x1000
+thread4:
+
+// Everything from here may be freed after kernel initialization.
+init_start:
+
+thread_start:
+	.word thread0
+	.word thread1
+	.word thread2
+	.word thread3
+	.word thread4