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@@ -22,7 +22,7 @@
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#define __JZ4740_HH__
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// Main clock, for cpu, serial port, and with divisors for most other hardware
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#define JZ_EXTAL 12000000 /* 3.6864 MHz */
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#define JZ_EXTAL 12000000 /* 12 MHz */
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// RTC clock
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#define RTC_CLOCK 32768 /* 32.768 KHz */
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// Interrupt source used for system timer
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@@ -50,7 +50,7 @@
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#define CIM_PHYSICAL 0x13060000
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#define ETH_PHYSICAL 0x13100000
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#ifdef __KERNEL
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#ifdef __KERNEL__
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// In kernel space you need to add 0xa0000000 to see them unmapped uncached in kseg2.
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#define CPM_BASE (0xa0000000 + CPM_PHYSICAL)
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#define INTC_BASE (0xa0000000 + INTC_PHYSICAL)
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@@ -102,7 +102,7 @@
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#define ETH_BASE 0x00014000
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// Default lcd framebuffer mapping space.
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#define LCD_FRAMEBUFFER_BASE ((unsigned short *)0x00015000)
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#define LCD_FRAMEBUFFER_BASE ((unsigned char *)0x00015000)
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// Map IO memory (requires a priviledged Kernel::my_thread capability).
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#include <iris.hh>
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@@ -2346,17 +2346,18 @@ static void gpio_disable_pull (unsigned p, unsigned pins):
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// CPM
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//**************************************************************************
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static void pll_init ():
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unsigned PHM_DIV = 3
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unsigned int cfcr, plcr1
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int n2FR[33] = { 0, 0, 1, 2, 3, 0, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 9 }
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int nf, pllout2;
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cfcr = CPM_CPCCR_CLKOEN | (n2FR[1] << CPM_CPCCR_CDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_HDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_PDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_MDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_LDIV_BIT)
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pllout2 = (cfcr & CPM_CPCCR_PCS) ? 252000000 : (252000000 / 2)
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CPM_UHCCDR = pllout2 / 48000000 - 1
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nf = 252000000 * 2 / JZ_EXTAL
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plcr1 = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | (0 << CPM_CPPCR_PLLN_BIT) | (0 << CPM_CPPCR_PLLOD_BIT) | (0x20 << CPM_CPPCR_PLLST_BIT) | CPM_CPPCR_PLLEN
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CPM_CPCCR = cfcr
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CPM_CPPCR = plcr1
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// The cpu clock is set to 252 MHz
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unsigned const cpu_clock = 252000000
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// The usb clock must be 48 MHz
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unsigned const usb_clock = 48000000
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// ssi clock must be 12 MHz, therefore it is taken directly from JZ_EXTAL, not from divided pll output.
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// USB clock must be 48 MHz.
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CPM_UHCCDR = (cpu_clock / 2) / usb_clock - 1
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// Set up dividers; see documentation for the meaning of all the values.
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CPM_CPCCR = CPM_CPCCR_CLKOEN | CPM_CPCCR_UCS | (0 << CPM_CPCCR_CDIV_BIT) | (2 << CPM_CPCCR_HDIV_BIT) | (2 << CPM_CPCCR_PDIV_BIT) | (2 << CPM_CPCCR_MDIV_BIT) | (3 << CPM_CPCCR_LDIV_BIT)
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// Configure the pll frequency to 252 MHz.
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CPM_CPPCR = ((cpu_clock * 2 / JZ_EXTAL - 2) << CPM_CPPCR_PLLM_BIT) | (0 << CPM_CPPCR_PLLN_BIT) | (0 << CPM_CPPCR_PLLOD_BIT) | (0x20 << CPM_CPPCR_PLLST_BIT) | CPM_CPPCR_PLLEN
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static unsigned cpm_get_pllm ():
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return (CPM_CPPCR & CPM_CPPCR_PLLM_MASK) >> CPM_CPPCR_PLLM_BIT
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@@ -2388,32 +2389,32 @@ static unsigned cpm_get_uhcdiv ():
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static unsigned cpm_get_ssidiv ():
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return (CPM_SSICDR & CPM_SSICDR_SSIDIV_MASK) >> CPM_SSICDR_SSIDIV_BIT
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static unsigned cpm_set_cdiv (unsigned v):
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return CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_CDIV_MASK) | (v << (CPM_CPCCR_CDIV_BIT))
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static unsigned cpm_set_hdiv (unsigned v):
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return CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_HDIV_MASK) | (v << (CPM_CPCCR_HDIV_BIT))
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static unsigned cpm_set_pdiv (unsigned v):
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return CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_PDIV_MASK) | (v << (CPM_CPCCR_PDIV_BIT))
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static unsigned cpm_set_mdiv (unsigned v):
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return CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_MDIV_MASK) | (v << (CPM_CPCCR_MDIV_BIT))
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static unsigned cpm_set_ldiv (unsigned v):
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return CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_LDIV_MASK) | (v << (CPM_CPCCR_LDIV_BIT))
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static unsigned cpm_set_udiv (unsigned v):
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return CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_UDIV_MASK) | (v << (CPM_CPCCR_UDIV_BIT))
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static unsigned cpm_set_i2sdiv (unsigned v):
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return CPM_I2SCDR = (CPM_I2SCDR & ~CPM_I2SCDR_I2SDIV_MASK) | (v << (CPM_I2SCDR_I2SDIV_BIT))
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static unsigned cpm_set_pixdiv (unsigned v):
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return CPM_LPCDR = (CPM_LPCDR & ~CPM_LPCDR_PIXDIV_MASK) | (v << (CPM_LPCDR_PIXDIV_BIT))
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static unsigned cpm_set_mscdiv (unsigned v):
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return CPM_MSCCDR = (CPM_MSCCDR & ~CPM_MSCCDR_MSCDIV_MASK) | (v << (CPM_MSCCDR_MSCDIV_BIT))
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static unsigned cpm_set_uhcdiv (unsigned v):
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return CPM_UHCCDR = (CPM_UHCCDR & ~CPM_UHCCDR_UHCDIV_MASK) | (v << (CPM_UHCCDR_UHCDIV_BIT))
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static unsigned cpm_ssiclk_select_exclk ():
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return CPM_SSICDR &= ~CPM_SSICDR_SCS
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static unsigned cpm_ssiclk_select_pllout ():
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return CPM_SSICDR |= CPM_SSICDR_SCS
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static unsigned cpm_set_ssidiv (unsigned v):
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return CPM_SSICDR = (CPM_SSICDR & ~CPM_SSICDR_SSIDIV_MASK) | ((v) << (CPM_SSICDR_SSIDIV_BIT))
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static void cpm_set_cdiv (unsigned v):
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CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_CDIV_MASK) | (v << (CPM_CPCCR_CDIV_BIT))
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static void cpm_set_hdiv (unsigned v):
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CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_HDIV_MASK) | (v << (CPM_CPCCR_HDIV_BIT))
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static void cpm_set_pdiv (unsigned v):
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CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_PDIV_MASK) | (v << (CPM_CPCCR_PDIV_BIT))
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static void cpm_set_mdiv (unsigned v):
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CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_MDIV_MASK) | (v << (CPM_CPCCR_MDIV_BIT))
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static void cpm_set_ldiv (unsigned v):
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CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_LDIV_MASK) | (v << (CPM_CPCCR_LDIV_BIT))
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static void cpm_set_udiv (unsigned v):
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CPM_CPCCR = (CPM_CPCCR & ~CPM_CPCCR_UDIV_MASK) | (v << (CPM_CPCCR_UDIV_BIT))
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static void cpm_set_i2sdiv (unsigned v):
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CPM_I2SCDR = (CPM_I2SCDR & ~CPM_I2SCDR_I2SDIV_MASK) | (v << (CPM_I2SCDR_I2SDIV_BIT))
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static void cpm_set_pixdiv (unsigned v):
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CPM_LPCDR = (CPM_LPCDR & ~CPM_LPCDR_PIXDIV_MASK) | (v << (CPM_LPCDR_PIXDIV_BIT))
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static void cpm_set_mscdiv (unsigned v):
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CPM_MSCCDR = (CPM_MSCCDR & ~CPM_MSCCDR_MSCDIV_MASK) | (v << (CPM_MSCCDR_MSCDIV_BIT))
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static void cpm_set_uhcdiv (unsigned v):
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CPM_UHCCDR = (CPM_UHCCDR & ~CPM_UHCCDR_UHCDIV_MASK) | (v << (CPM_UHCCDR_UHCDIV_BIT))
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static void cpm_ssiclk_select_exclk ():
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CPM_SSICDR &= ~CPM_SSICDR_SCS
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static void cpm_ssiclk_select_pllout ():
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CPM_SSICDR |= CPM_SSICDR_SCS
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static void cpm_set_ssidiv (unsigned v):
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CPM_SSICDR = (CPM_SSICDR & ~CPM_SSICDR_SSIDIV_MASK) | ((v) << (CPM_SSICDR_SSIDIV_BIT))
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#define cpm_select_i2sclk_exclk() (CPM_CPCCR &= ~CPM_CPCCR_I2CS)
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#define cpm_select_i2sclk_pll() (CPM_CPCCR |= CPM_CPCCR_I2CS)
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@@ -2485,7 +2486,7 @@ static unsigned cpm_get_pllout ():
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m = cpm_get_pllm () + 2
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n = cpm_get_plln () + 2
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no = od[cpm_get_pllod ()]
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pllout = ((JZ_EXTAL) / (n * no)) * m
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pllout = JZ_EXTAL * m / n / no
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else:
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pllout = JZ_EXTAL
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return pllout
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@@ -3011,6 +3012,13 @@ static void ac97_cold_reset_codec():
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#define i2s_reset_codec() do { } while (0)
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static void aic_use_internal_codec ():
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aic_internal_codec ()
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aic_select_i2s ()
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i2s_as_slave ()
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i2s_select_i2s ()
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cpm_select_i2sclk_exclk ()
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cpm_set_i2sdiv (1)
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//**************************************************************************
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// ICDC
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@@ -3598,8 +3606,8 @@ static void setup_sdram ():
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unsigned cas_latency_dmcr[2] = { 1 << EMC_DMCR_TCL_BIT, 2 << EMC_DMCR_TCL_BIT }
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}
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cpu_clk = 225000000
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gpio_as_sdram_32bit ()
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cpu_clk = 252000000
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gpio_as_sdram_16bit ()
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unsigned SDRAM_BW16 = 0
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unsigned SDRAM_BANK4 = 1
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unsigned SDRAM_ROW = 13
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Bas Wijnen