Looking for the lcd problem and more

boot-programs/buzzer.ccp

@@ -27,9 +27,9 @@ class DevBuzzer:
 	public:
 	DevBuzzer ():
 		is_beeping = false
-		gpio_as_pwm4 ()
 		tcu_stop_counter (pwm)
-		tcu_select_extalclk (pwm)
+		//tcu_select_extalclk (pwm)
+		tcu_select_pclk (pwm)
 		tcu_select_clk_div64 (pwm)
 		tcu_enable_pwm_output (pwm)
 	void stop ():
@@ -54,7 +54,6 @@ enum codes:
 	BUZZER = 32
 
 Kernel::Num start ():
-	map_gpio ()
 	map_tcu ()
 
 	DevBuzzer buzzer

boot-programs/lcd.ccp

@@ -24,12 +24,12 @@ __asm__ volatile (".section .rodata\n.globl charset\ncharset:\n.incbin \"boot-pr
 // charset is really the first character in the array.  Its address is used as the start of the array.
 extern unsigned char const charset[127-32][6]
 
-#define assert(x) do { while (!(x)) kdebug ("assertion failed " #x); } while (0)
+#define assert(x) do { if (!(x)) { kdebug ("assertion failed " #x); while (true) {} } } while (0)
 
 #if defined (TRENDTAC)
 static unsigned h = 800, v = 480, fps = 60, Bpp = 2
 #elif defined (NANONOTE)
-static unsigned h = 320, v = 240, fps = 70, Bpp = 4
+static unsigned h = 320, v = 240, fps = 60, Bpp = 4
 #else
 #error unknown board
 #endif
@@ -68,7 +68,7 @@ enum spi_reg:
 	BACKLIGHT2	= 0x08
 	SYNC		= 0x0b
 	POLARITY	= 0x0c
-	CONTRAST_B	= 0x0d
+	CONTRAST_RGB	= 0x0d
 	SUB_CONTRAST_R	= 0x0e
 	SUB_BRIGHTNESS_R= 0x0f
 	SUB_CONTRAST_B	= 0x10
@@ -86,9 +86,9 @@ enum spi_reg:
 	FB		= 0xb1
 
 static void write_reg (unsigned reg, unsigned val):
+	unsigned value = (reg << 8) | (val & 0xff)
 	gpio_clear (SP_PORT, 1 << SPEN)
 	udelay (1)
-	unsigned value = (reg << 8) | (val & 0xff)
 	for unsigned i = 0; i < 16; ++i, value <<= 1:
 		gpio_clear (SP_PORT, 1 << SPCK)
 		if value & 0x8000:
@@ -97,7 +97,7 @@ static void write_reg (unsigned reg, unsigned val):
 			gpio_clear (SP_PORT, 1 << SPDA)
 		udelay (4)
 		gpio_set (SP_PORT, 1 << SPCK)
-		udelay (1)
+		udelay (4)
 	gpio_set (SP_PORT, 1 << SPEN)
 	udelay(4)
 #endif
@@ -111,7 +111,7 @@ static void reset ():
 	unsigned hsync = 80, hpre = 80, hpost = 0
 
 	// One clock pulse per pixel.
-	unsigned extra = 0
+	unsigned cpp = 1
 	// Bits per pixel.
 	unsigned bpp = LCD_CTRL_BPP_16
 	// Configuration.
@@ -120,39 +120,30 @@ static void reset ():
 	unsigned cfg = MODE_TFT_GEN | VSYNC_N
 	#elif defined (NANONOTE)
 	// Note that the sync pulse is part of the pre-display region.
+	// Horizontal timings.
+	unsigned hsync = 1, hpre = 141, hpost = 273
 	// Vertical timings.
 	unsigned vsync = 1, vpre = 21, vpost = 2
-	// Horizontal timings.
-	unsigned hsync = 1, hpre = 70, hpost = 686
-
-	// 3 bytes per pixel, so for the display area 2 extra clocks are sent.
-	unsigned extra = 2
+	// 3 clocks per pixel.
+	unsigned cpp = 3
 	// Bits per pixel.
 	unsigned bpp = LCD_CTRL_BPP_18_24
 	// Configuration.
 	unsigned cfg = LCD_CFG_MODE_SERIAL_TFT | LCD_CFG_HSP | LCD_CFG_VSP
 	// Set up SPI pins.
-	gpio_as_output(SP_PORT, (1 << SPEN) | (1 << SPCK) | (1 << SPDA))
+	gpio_as_output (SP_PORT, (1 << SPEN) | (1 << SPCK) | (1 << SPDA))
 	gpio_set (SP_PORT, (1 << SPEN) | (1 << SPCK))
 	#else
 	#error unknown board
 	#endif
 
 	// Note that the sync pulse is part of the pre-display region.
-	unsigned vps = 0, vpe = vps + vsync, vds = vps + vpre, vde = vds + v, vt = vde + vpost
-	unsigned hps = 0, hpe = hps + hsync, hds = hps + hpre, hde = hds + h, ht = hde + hpost
-
-	LCD_CFG = cfg
-	LCD_HSYNC = (hps << 16) | hpe
-	LCD_VSYNC = (vps << 16) | vpe
-	LCD_VAT = (ht << 16) | vt
-	LCD_DAH = (hds << 16) | hde
-	LCD_DAV = (vds << 16) | vde
-	LCD_CTRL = (bpp << LCD_CTRL_BPP_BIT) | LCD_CTRL_BST_16
+	unsigned vpe = vsync, vds = vpre, vde = vds + v, vt = vde + vpost
+	unsigned hpe = hsync, hds = hpre, hde = hds + cpp * h, ht = hde + hpost
 
 	cpm_stop_lcd ()
 
-	unsigned pixclock = fps * (ht + extra * h) * vt
+	unsigned pixclock = fps * ht * vt
 
 	#if defined (TRENDTAC)
 	unsigned pllout = cpm_get_pllout ()
@@ -165,30 +156,47 @@ static void reset ():
 	CPM_CFCR |= CPM_CFCR_UPE
 	#elif defined (NANONOTE)
 	unsigned val = cpm_get_pllout2 () / pixclock - 1
+	kdebug ("clock: ")
 	kdebug_num (val)
 	kdebug ("\n")
-	assert (val < 0x400)
-	cpm_set_pixdiv (val);
+	//assert (val < 0x400)
+	//cpm_set_pixdiv (val)
+	//cpm_set_pixdiv (12)
 
-	val = cpm_get_pllout () / (pixclock * 3)
+	val = cpm_get_pllout2 () / (pixclock * 3) - 1
+	kdebug ("clock: ")
+	kdebug_num (val)
+	kdebug ("\n")
 	assert (val < 0x20)
-	cpm_set_ldiv (val)
+	//cpm_set_ldiv (val)
 	// Update dividers.
-	CPM_CPCCR |= CPM_CPCCR_CE
+	//CPM_CPCCR |= CPM_CPCCR_CE
+	#else
+	#error "Unknown board"
 	#endif
 
 	cpm_start_lcd ()
-	LCD_DA0 = physical_descriptor
-	lcd_set_ena ()
-	//lcd_enable_eof_intr ()
 
 	#ifdef NANONOTE
-	// Reset registers.
-	write_reg (BACKLIGHT1, 0)
+	// Reset the controller.
+	//write_reg (BACKLIGHT1, 0x1e)
 	// Enable display.
 	write_reg (BACKLIGHT1, 0x5f)
+	// Set data to rgbrgbrgb input, with a delta color filter.
+	write_reg (COLOR, 0x01)
 	#endif
 
+	LCD_CTRL = (bpp << LCD_CTRL_BPP_BIT) | LCD_CTRL_BST_16
+	LCD_CFG = cfg
+	LCD_HSYNC = hpe
+	LCD_VSYNC = vpe
+	LCD_VAT = (ht << 16) | vt
+	LCD_DAH = (hds << 16) | hde
+	LCD_DAV = (vds << 16) | vde
+	LCD_DA0 = physical_descriptor
+	LCD_CTRL = (bpp << LCD_CTRL_BPP_BIT) | LCD_CTRL_BST_16 | LCD_CTRL_ENA
+	//lcd_enable_eof_intr ()
+
 static void putchar (unsigned x, unsigned y, unsigned ch, unsigned fg = 0xffff, unsigned bg = 0x0000):
 	if ch < 32 || ch > 126:
 		ch = 127
@@ -239,7 +247,9 @@ static void log_msg ():
 	log_char ('\n')
 
 enum captype:
+	#ifdef TRENDTAC
 	LOG
+	#endif
 	SET_EOF_CB
 
 Kernel::Num start ():
@@ -266,6 +276,7 @@ Kernel::Num start ():
 			#if defined (TRENDTAC)
 			LCD_FRAMEBUFFER_BASE[y * h + x] = ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3)
 			#elif defined (NANONOTE)
+			LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 3] = 0
 			LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 2] = r
 			LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 1] = g
 			LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 0] = b
@@ -284,8 +295,8 @@ Kernel::Num start ():
 	__asm__ volatile ("lw $a0, %0\ncache 0x15, 0($a0)" :: "m"(dptr) : "memory", "a0")
 	reset ()
 
-	Kernel::Cap logcap = Kernel::my_receiver.create_capability (LOG)
 	#if defined (TRENDTAC)
+	Kernel::Cap logcap = Kernel::my_receiver.create_capability (LOG)
 	__asm__ volatile ("li $a0, 1\nlw $a1, %0\nbreak" :: "m"(logcap.code): "a0", "a1", "memory")
 	#endif
 
@@ -310,9 +321,11 @@ Kernel::Num start ():
 				reply.invoke ()
 				Kernel::free_cap (reply)
 				break
+			#ifdef TRENDTAC
 			case LOG:
 				log_char (Kernel::recv.data[0].l)
 				break
+			#endif
 			default:
 				log_char ('~')
 				break

boot-programs/udc.ccp

@@ -16,6 +16,7 @@
 // You should have received a copy of the GNU General Public License
 // along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
+#include "iris.hh"
 #include "devices.hh"
 #define ARCH
 #include "arch.hh"
@@ -153,6 +154,7 @@ void Udc::init ():
 	configuration = 0
 	size = 0
 	// exit suspend mode by reading the interrupt register.
+	cpm_start_udc ()
 	unsigned i = UDC_INTRUSB
 	// reset all pending endpoint interrupts.
 	i = UDC_INTRIN
@@ -331,6 +333,7 @@ enum pdata:
 Kernel::Num start ():
 	map_udc ()
 	map_gpio ()
+	map_cpm ()
 	Udc udc
 
 	udc.init ()