mirror of
git://projects.qi-hardware.com/iris.git
synced 2025-04-21 12:27:27 +03:00
things are working
This commit is contained in:
@@ -157,16 +157,10 @@ static arch_page *alloc_page (Memory *mem, arch_page_table *t):
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static void free_page_table (arch_page_table *t, unsigned idx):
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Memory *mem = t->address_space
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if t->next:
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t->next->prev = t->prev
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if t->prev:
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t->prev->next = t->next
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else:
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mem->arch.first_page_table = t->next
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mem->zfree ((unsigned)mem->arch.directory[idx])
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mem->arch.directory[idx] = NULL
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mem->arch.shadow[idx] = NULL
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mem->free_obj (t)
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mem->free_obj (t, (void **)&mem->arch.first_page_table)
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if !mem->arch.first_page_table:
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mem->zfree ((unsigned)mem->arch.directory)
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mem->zfree ((unsigned)mem->arch.shadow)
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@@ -186,12 +180,6 @@ static void tlb_reset (unsigned address, unsigned asid, unsigned value):
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__asm__ volatile ("tlbwi")
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static void free_page (arch_page_table *t, arch_page *p):
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if p->next:
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p->next->prev = p->prev
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if p->prev:
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p->prev->next = p->next
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else:
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t->first_page = p->next
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if p->prev_mapped:
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p->prev_mapped->next_mapped = p->next_mapped
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else:
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@@ -200,7 +188,7 @@ static void free_page (arch_page_table *t, arch_page *p):
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p->next_mapped->prev_mapped = p->prev_mapped
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tlb_reset (p->mapping, p->address_space->arch.asid, 0)
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unsigned idx = p->mapping >> 21
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p->address_space->free_obj (p)
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p->address_space->free_obj (p, (void **)&t->first_page)
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if !t->first_page:
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free_page_table (t, idx)
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@@ -274,6 +274,12 @@ void init (unsigned mem):
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gpio_as_ssi()
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gpio_as_msc ()
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gpio_as_gpio (GPIO_CAPS_PORT, GPIO_CAPS)
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gpio_as_gpio (GPIO_SCROLL_PORT, GPIO_SCROLL)
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gpio_as_gpio (GPIO_NUM_PORT, GPIO_NUM)
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gpio_as_gpio (GPIO_TP_LEFT_PORT, GPIO_TP_LEFT)
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gpio_as_gpio (GPIO_TP_RIGHT_PORT, GPIO_TP_RIGHT)
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// Start the operating system timer, and set it to give an interrupt immediately.
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// This is better, because the kernel starts with jumping into the idle task and
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// waiting for the first interrupt.
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@@ -30,7 +30,7 @@ static void handle_exit ():
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if !current:
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current = &idle
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if (current->flags & (THREAD_FLAG_RUNNING | THREAD_FLAG_WAITING)) != THREAD_FLAG_RUNNING:
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panic (0x99338844, "non-scheduled thread running")
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panic (current->flags, "non-scheduled thread running")
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if !current:
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current = &idle
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if old_current == current:
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@@ -61,22 +61,20 @@ static void handle_exit ():
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/// when k0 or k1 is not 0, or when an error occurs.
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/// Otherwise, the ultra-fast code in entry.S is used.
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Thread *tlb_refill ():
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//panic (0x88776655, "TLB refill")
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old_current = current
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if !directory:
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panic (0x44449999, "No directory")
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (ERR_NO_PAGE_DIRECTORY, addr)
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handle_exit ()
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return current
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unsigned EntryHi
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cp0_get (CP0_ENTRY_HI, EntryHi)
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unsigned *t = directory[EntryHi >> 21]
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if !t:
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unsigned a
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cp0_get (CP0_EPC, a)
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//dbg_send (a)
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cp0_get (CP0_BAD_V_ADDR, a)
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//dbg_send (a)
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panic (0x99992222, "No page table")
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (ERR_NO_PAGE_TABLE, addr)
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else:
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// - 2 instead of - 1 means reset bit 0
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unsigned idx = (EntryHi >> 12) & ((1 << 9) - 2)
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@@ -88,7 +86,6 @@ Thread *tlb_refill ():
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/// An interrupt which is not an exception has occurred.
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Thread *interrupt ():
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//panic (0x88877722, "Interrupt")
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old_current = current
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unsigned ipr = INTC_IPR
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for unsigned i = 0; i < 32; ++i:
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@@ -134,7 +131,6 @@ static void arch_invoke ():
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if wait:
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old_current->wait ()
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if !target:
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//dbg_send (0, 0)
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// There must be no action here.
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else:
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Capability::Context c
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@@ -164,55 +160,45 @@ Thread *exception ():
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switch (cause >> 2) & 0x1f:
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case 0:
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// Interrupt. This shouldn't happen, since CAUSE[IV] == 1.
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panic (0x01223344, "Interrupt on exception vector.")
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panic (0, "Interrupt on exception vector.")
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break
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case 1:
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// TLB modification.
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panic (0x11223344, "TLB modification.")
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (ERR_WRITE_DENIED, addr)
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break
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case 2:
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// TLB load or instruction fetch.
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unsigned a
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cp0_get (CP0_EPC, a)
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//dbg_send (a)
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panic (0x21223344, "TLB load or instruction fetch.")
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (ERR_UNMAPPED_READ, addr)
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break
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case 3:
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// TLB store.
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unsigned a
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cp0_get (CP0_EPC, a)
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//dbg_send (a)
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cp0_get (CP0_BAD_V_ADDR, a)
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//dbg_send (a)
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panic (0x31223344, "TLB store.")
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (ERR_UNMAPPED_WRITE, addr)
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break
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case 4:
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// Address error load or instruction fetch.
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unsigned a
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cp0_get (CP0_EPC, a)
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//dbg_send (a)
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cp0_get (CP0_BAD_V_ADDR, a)
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//dbg_send (a)
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panic (0x41223344, "Address error load or instruction fetch.")
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (ERR_INVALID_ADDRESS_READ, addr)
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break
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case 5:
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// Address error store.
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//dbg_send (current->arch.v1, 4)
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//unsigned a
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//cp0_get (CP0_EPC, a)
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//dbg_send (*(unsigned *)(a & ~3), 32)
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//dbg_send (a, 32)
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//cp0_get (CP0_BAD_V_ADDR, a)
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//dbg_send (a, 32)
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panic (0x51223344, "Address error store.")
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (ERR_INVALID_ADDRESS_WRITE, addr)
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break
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case 6:
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// Bus error instruction fetch.
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panic (0x61223344, "Bus error instruction fetch.")
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panic (0, "Bus error instruction fetch.")
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break
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case 7:
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// Bus error load or store.
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panic (0x71223344, "Bus error load or store.")
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panic (0, "Bus error load or store.")
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break
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case 8:
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// Syscall.
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@@ -221,37 +207,40 @@ Thread *exception ():
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break
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case 9:
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// Breakpoint.
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//panic (0x91223344, "Breakpoint.")
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#if 0
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current->raise (ERR_BREAKPOINT, 0)
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#else
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current->pc += 4
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if current->arch.a0:
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if dbg_cap:
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panic (0x34259380, "Break instruction while log capability was already set")
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panic (0, "Break instruction while log capability was already set")
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break
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bool dummy
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dbg_cap = current->address_space->find_capability (current->arch.a1, &dummy)
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if !dbg_cap:
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panic (0x06111129, "no log capability provided")
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panic (0, "no log capability provided")
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break
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break
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if dbg_cap:
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dbg_log_char (current->arch.a1)
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break
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break
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#endif
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case 10:
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// Reserved instruction.
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panic (0xa1223344, "Reserved instruction.")
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current->raise (ERR_RESERVED_INSTRUCTION, 0)
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break
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case 11:
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// Coprocessor unusable.
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panic (0xb1223344, "Coprocessor unusable.")
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current->raise (ERR_COPROCESSOR_UNUSABLE, 0)
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break
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case 12:
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// Arithmetic overflow.
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panic (0xc1223344, "Arithmetic overflow.")
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current->raise (ERR_OVERFLOW, 0)
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break
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case 13:
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// Trap.
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panic (0xd1223344, "Trap.")
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current->raise (ERR_TRAP, 0)
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break
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case 15:
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// Floating point exception.
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@@ -259,7 +248,7 @@ Thread *exception ():
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break
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case 23:
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// Reference to WatchHi/WatchLo address.
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panic (0xf1223344, "Reference to WatchHi/WatchLo address.")
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current->raise (ERR_WATCHPOINT, 0)
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break
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case 24:
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// Machine check.
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@@ -2837,6 +2837,66 @@ static __inline__ unsigned msc_calc_slow_clk_divisor (bool is_sd):
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#define GPIO_CHARG_STAT 29
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#define GPIO_TS_PENIRQ_PORT 2
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#define GPIO_TS_PENIRQ 4
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#define GPIO_CAPS_PORT 0
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#define GPIO_CAPS 27
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#define GPIO_SCROLL_PORT 0
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#define GPIO_SCROLL 9
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#define GPIO_NUM_PORT 2
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#define GPIO_NUM 22
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#define GPIO_TP_LEFT_PORT 0
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#define GPIO_TP_LEFT 16
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#define GPIO_TP_RIGHT_PORT 0
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#define GPIO_TP_RIGHT 13
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#define GPIO_HALF(x) (((x) & 0xf) << 1)
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static __inline__ void gpio_as_gpio (unsigned port, unsigned pin):
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unsigned mask = 3 << GPIO_HALF (pin)
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if pin < 16:
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GPIO_GPALR (port) &= ~mask
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else:
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GPIO_GPAUR (port) &= ~mask
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static __inline__ void gpio_as_input (unsigned port, unsigned pin):
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#if 0
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unsigned mask = 3 << GPIO_HALF (pin)
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if pin < 16:
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GPIO_GPIDLR (port) &= ~mask
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else:
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GPIO_GPIDUR (port) &= ~mask
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#else
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GPIO_GPDIR (port) &= ~(1 << pin)
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#endif
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static __inline__ void gpio_as_output (unsigned port, unsigned pin):
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#if 0
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unsigned half = 1 << GPIO_HALF (pin)
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if pin < 16:
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GPIO_GPIDLR (port) = (GPIO_GPIDLR (port) & ~(3 * half)) | half
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else:
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GPIO_GPIDUR (port) = (GPIO_GPIDUR (port) & ~(3 * half)) | half
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#else
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GPIO_GPDIR (port) |= 1 << pin
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#endif
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static __inline__ void gpio_irq (unsigned port, unsigned pin, unsigned how):
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unsigned half = 1 << GPIO_HALF (pin)
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if pin < 16:
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GPIO_GPIDLR (port) = (GPIO_GPIDLR (port) & ~(3 * half)) | (how * half)
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else:
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GPIO_GPIDUR (port) = (GPIO_GPIDUR (port) & ~(3 * half)) | (how * half)
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static __inline__ void gpio_irq_low (unsigned port, unsigned pin):
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gpio_irq (port, pin, GPIO_IRQ_LOLEVEL)
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static __inline__ void gpio_irq_high (unsigned port, unsigned pin):
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gpio_irq (port, pin, GPIO_IRQ_HILEVEL)
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static __inline__ void gpio_irq_fall (unsigned port, unsigned pin):
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gpio_irq (port, pin, GPIO_IRQ_FALLEDG)
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static __inline__ void gpio_irq_rise (unsigned port, unsigned pin):
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gpio_irq (port, pin, GPIO_IRQ_RAISEDG)
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/* Init the alternate function pins */
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