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mirror of git://projects.qi-hardware.com/iris.git synced 2025-04-21 12:27:27 +03:00

things are working

This commit is contained in:
Bas Wijnen
2009-07-25 00:54:12 +02:00
parent b7d9b1554c
commit df38266bb8
13 changed files with 393 additions and 220 deletions

View File

@@ -157,16 +157,10 @@ static arch_page *alloc_page (Memory *mem, arch_page_table *t):
static void free_page_table (arch_page_table *t, unsigned idx):
Memory *mem = t->address_space
if t->next:
t->next->prev = t->prev
if t->prev:
t->prev->next = t->next
else:
mem->arch.first_page_table = t->next
mem->zfree ((unsigned)mem->arch.directory[idx])
mem->arch.directory[idx] = NULL
mem->arch.shadow[idx] = NULL
mem->free_obj (t)
mem->free_obj (t, (void **)&mem->arch.first_page_table)
if !mem->arch.first_page_table:
mem->zfree ((unsigned)mem->arch.directory)
mem->zfree ((unsigned)mem->arch.shadow)
@@ -186,12 +180,6 @@ static void tlb_reset (unsigned address, unsigned asid, unsigned value):
__asm__ volatile ("tlbwi")
static void free_page (arch_page_table *t, arch_page *p):
if p->next:
p->next->prev = p->prev
if p->prev:
p->prev->next = p->next
else:
t->first_page = p->next
if p->prev_mapped:
p->prev_mapped->next_mapped = p->next_mapped
else:
@@ -200,7 +188,7 @@ static void free_page (arch_page_table *t, arch_page *p):
p->next_mapped->prev_mapped = p->prev_mapped
tlb_reset (p->mapping, p->address_space->arch.asid, 0)
unsigned idx = p->mapping >> 21
p->address_space->free_obj (p)
p->address_space->free_obj (p, (void **)&t->first_page)
if !t->first_page:
free_page_table (t, idx)

View File

@@ -274,6 +274,12 @@ void init (unsigned mem):
gpio_as_ssi()
gpio_as_msc ()
gpio_as_gpio (GPIO_CAPS_PORT, GPIO_CAPS)
gpio_as_gpio (GPIO_SCROLL_PORT, GPIO_SCROLL)
gpio_as_gpio (GPIO_NUM_PORT, GPIO_NUM)
gpio_as_gpio (GPIO_TP_LEFT_PORT, GPIO_TP_LEFT)
gpio_as_gpio (GPIO_TP_RIGHT_PORT, GPIO_TP_RIGHT)
// Start the operating system timer, and set it to give an interrupt immediately.
// This is better, because the kernel starts with jumping into the idle task and
// waiting for the first interrupt.

View File

@@ -30,7 +30,7 @@ static void handle_exit ():
if !current:
current = &idle
if (current->flags & (THREAD_FLAG_RUNNING | THREAD_FLAG_WAITING)) != THREAD_FLAG_RUNNING:
panic (0x99338844, "non-scheduled thread running")
panic (current->flags, "non-scheduled thread running")
if !current:
current = &idle
if old_current == current:
@@ -61,22 +61,20 @@ static void handle_exit ():
/// when k0 or k1 is not 0, or when an error occurs.
/// Otherwise, the ultra-fast code in entry.S is used.
Thread *tlb_refill ():
//panic (0x88776655, "TLB refill")
old_current = current
if !directory:
panic (0x44449999, "No directory")
unsigned addr
cp0_get (CP0_BAD_V_ADDR, addr)
current->raise (ERR_NO_PAGE_DIRECTORY, addr)
handle_exit ()
return current
unsigned EntryHi
cp0_get (CP0_ENTRY_HI, EntryHi)
unsigned *t = directory[EntryHi >> 21]
if !t:
unsigned a
cp0_get (CP0_EPC, a)
//dbg_send (a)
cp0_get (CP0_BAD_V_ADDR, a)
//dbg_send (a)
panic (0x99992222, "No page table")
unsigned addr
cp0_get (CP0_BAD_V_ADDR, addr)
current->raise (ERR_NO_PAGE_TABLE, addr)
else:
// - 2 instead of - 1 means reset bit 0
unsigned idx = (EntryHi >> 12) & ((1 << 9) - 2)
@@ -88,7 +86,6 @@ Thread *tlb_refill ():
/// An interrupt which is not an exception has occurred.
Thread *interrupt ():
//panic (0x88877722, "Interrupt")
old_current = current
unsigned ipr = INTC_IPR
for unsigned i = 0; i < 32; ++i:
@@ -134,7 +131,6 @@ static void arch_invoke ():
if wait:
old_current->wait ()
if !target:
//dbg_send (0, 0)
// There must be no action here.
else:
Capability::Context c
@@ -164,55 +160,45 @@ Thread *exception ():
switch (cause >> 2) & 0x1f:
case 0:
// Interrupt. This shouldn't happen, since CAUSE[IV] == 1.
panic (0x01223344, "Interrupt on exception vector.")
panic (0, "Interrupt on exception vector.")
break
case 1:
// TLB modification.
panic (0x11223344, "TLB modification.")
unsigned addr
cp0_get (CP0_BAD_V_ADDR, addr)
current->raise (ERR_WRITE_DENIED, addr)
break
case 2:
// TLB load or instruction fetch.
unsigned a
cp0_get (CP0_EPC, a)
//dbg_send (a)
panic (0x21223344, "TLB load or instruction fetch.")
unsigned addr
cp0_get (CP0_BAD_V_ADDR, addr)
current->raise (ERR_UNMAPPED_READ, addr)
break
case 3:
// TLB store.
unsigned a
cp0_get (CP0_EPC, a)
//dbg_send (a)
cp0_get (CP0_BAD_V_ADDR, a)
//dbg_send (a)
panic (0x31223344, "TLB store.")
unsigned addr
cp0_get (CP0_BAD_V_ADDR, addr)
current->raise (ERR_UNMAPPED_WRITE, addr)
break
case 4:
// Address error load or instruction fetch.
unsigned a
cp0_get (CP0_EPC, a)
//dbg_send (a)
cp0_get (CP0_BAD_V_ADDR, a)
//dbg_send (a)
panic (0x41223344, "Address error load or instruction fetch.")
unsigned addr
cp0_get (CP0_BAD_V_ADDR, addr)
current->raise (ERR_INVALID_ADDRESS_READ, addr)
break
case 5:
// Address error store.
//dbg_send (current->arch.v1, 4)
//unsigned a
//cp0_get (CP0_EPC, a)
//dbg_send (*(unsigned *)(a & ~3), 32)
//dbg_send (a, 32)
//cp0_get (CP0_BAD_V_ADDR, a)
//dbg_send (a, 32)
panic (0x51223344, "Address error store.")
unsigned addr
cp0_get (CP0_BAD_V_ADDR, addr)
current->raise (ERR_INVALID_ADDRESS_WRITE, addr)
break
case 6:
// Bus error instruction fetch.
panic (0x61223344, "Bus error instruction fetch.")
panic (0, "Bus error instruction fetch.")
break
case 7:
// Bus error load or store.
panic (0x71223344, "Bus error load or store.")
panic (0, "Bus error load or store.")
break
case 8:
// Syscall.
@@ -221,37 +207,40 @@ Thread *exception ():
break
case 9:
// Breakpoint.
//panic (0x91223344, "Breakpoint.")
#if 0
current->raise (ERR_BREAKPOINT, 0)
#else
current->pc += 4
if current->arch.a0:
if dbg_cap:
panic (0x34259380, "Break instruction while log capability was already set")
panic (0, "Break instruction while log capability was already set")
break
bool dummy
dbg_cap = current->address_space->find_capability (current->arch.a1, &dummy)
if !dbg_cap:
panic (0x06111129, "no log capability provided")
panic (0, "no log capability provided")
break
break
if dbg_cap:
dbg_log_char (current->arch.a1)
break
break
#endif
case 10:
// Reserved instruction.
panic (0xa1223344, "Reserved instruction.")
current->raise (ERR_RESERVED_INSTRUCTION, 0)
break
case 11:
// Coprocessor unusable.
panic (0xb1223344, "Coprocessor unusable.")
current->raise (ERR_COPROCESSOR_UNUSABLE, 0)
break
case 12:
// Arithmetic overflow.
panic (0xc1223344, "Arithmetic overflow.")
current->raise (ERR_OVERFLOW, 0)
break
case 13:
// Trap.
panic (0xd1223344, "Trap.")
current->raise (ERR_TRAP, 0)
break
case 15:
// Floating point exception.
@@ -259,7 +248,7 @@ Thread *exception ():
break
case 23:
// Reference to WatchHi/WatchLo address.
panic (0xf1223344, "Reference to WatchHi/WatchLo address.")
current->raise (ERR_WATCHPOINT, 0)
break
case 24:
// Machine check.

View File

@@ -2837,6 +2837,66 @@ static __inline__ unsigned msc_calc_slow_clk_divisor (bool is_sd):
#define GPIO_CHARG_STAT 29
#define GPIO_TS_PENIRQ_PORT 2
#define GPIO_TS_PENIRQ 4
#define GPIO_CAPS_PORT 0
#define GPIO_CAPS 27
#define GPIO_SCROLL_PORT 0
#define GPIO_SCROLL 9
#define GPIO_NUM_PORT 2
#define GPIO_NUM 22
#define GPIO_TP_LEFT_PORT 0
#define GPIO_TP_LEFT 16
#define GPIO_TP_RIGHT_PORT 0
#define GPIO_TP_RIGHT 13
#define GPIO_HALF(x) (((x) & 0xf) << 1)
static __inline__ void gpio_as_gpio (unsigned port, unsigned pin):
unsigned mask = 3 << GPIO_HALF (pin)
if pin < 16:
GPIO_GPALR (port) &= ~mask
else:
GPIO_GPAUR (port) &= ~mask
static __inline__ void gpio_as_input (unsigned port, unsigned pin):
#if 0
unsigned mask = 3 << GPIO_HALF (pin)
if pin < 16:
GPIO_GPIDLR (port) &= ~mask
else:
GPIO_GPIDUR (port) &= ~mask
#else
GPIO_GPDIR (port) &= ~(1 << pin)
#endif
static __inline__ void gpio_as_output (unsigned port, unsigned pin):
#if 0
unsigned half = 1 << GPIO_HALF (pin)
if pin < 16:
GPIO_GPIDLR (port) = (GPIO_GPIDLR (port) & ~(3 * half)) | half
else:
GPIO_GPIDUR (port) = (GPIO_GPIDUR (port) & ~(3 * half)) | half
#else
GPIO_GPDIR (port) |= 1 << pin
#endif
static __inline__ void gpio_irq (unsigned port, unsigned pin, unsigned how):
unsigned half = 1 << GPIO_HALF (pin)
if pin < 16:
GPIO_GPIDLR (port) = (GPIO_GPIDLR (port) & ~(3 * half)) | (how * half)
else:
GPIO_GPIDUR (port) = (GPIO_GPIDUR (port) & ~(3 * half)) | (how * half)
static __inline__ void gpio_irq_low (unsigned port, unsigned pin):
gpio_irq (port, pin, GPIO_IRQ_LOLEVEL)
static __inline__ void gpio_irq_high (unsigned port, unsigned pin):
gpio_irq (port, pin, GPIO_IRQ_HILEVEL)
static __inline__ void gpio_irq_fall (unsigned port, unsigned pin):
gpio_irq (port, pin, GPIO_IRQ_FALLEDG)
static __inline__ void gpio_irq_rise (unsigned port, unsigned pin):
gpio_irq (port, pin, GPIO_IRQ_RAISEDG)
/* Init the alternate function pins */