#pypp 0 // Iris: micro-kernel for a capability-based operating system. // boot-programs/lcd.ccp: Display driver. // Copyright 2009 Bas Wijnen // // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation, either version 3 of the License, or // (at your option) any later version. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program. If not, see . #include "devices.hh" #define ARCH #include "arch.hh" __asm__ volatile (".section .rodata\n.globl charset\ncharset:\n.incbin \"boot-programs/charset.data\"\n.section .text") // charset is really the first character in the array. Its address is used as the start of the array. extern unsigned char const charset[127-32][6] #define assert(x) do { while (!(x)) kdebug ("assertion failed " #x); } while (0) #if defined (TRENDTAC) static unsigned h = 800, v = 480, fps = 60, Bpp = 2 #elif defined (NANONOTE) static unsigned h = 320, v = 240, fps = 70, Bpp = 4 #else #error unknown board #endif #define frame_size (v * h * Bpp) static unsigned physical_descriptor /**/struct Descriptor { unsigned next; unsigned frame; unsigned id; unsigned cmd; } __attribute__ ((packed)) #if defined (NANONOTE) #define SP_PORT 2 #define SPEN 21 #define SPDA 22 #define SPCK 23 static void udelay (unsigned num): for unsigned i = 0; i < num * (JZ_EXTAL / 1000000); ++i: // set 0 does nothing, but costs at least one clock pulse. gpio_set (SP_PORT, 0) // Register names. The registers are not named in the datasheet, and in some cases the name only describes a part of the bits in it. // The registers with bit 6 set have bit 7 set instead, because of the transfer method. enum spi_reg: AC = 0x00 DC = 0x01 BRIGHTNESS = 0x03 FORMAT = 0x04 BACKLIGHT1 = 0x05 VBLANK = 0x06 HBLANK = 0x07 BACKLIGHT2 = 0x08 SYNC = 0x0b POLARITY = 0x0c CONTRAST_B = 0x0d SUB_CONTRAST_R = 0x0e SUB_BRIGHTNESS_R= 0x0f SUB_CONTRAST_B = 0x10 SUB_BRIGHTNESS_B= 0x11 TRIM = 0x12 COLOR = 0x13 GAMMA = 0x16 GAMMA1 = 0x17 GAMMA2 = 0x18 GAMMA3 = 0x19 GAMMA4 = 0x1a INVERSION = 0xa5 HLEVEL = 0xa6 LLEVEL = 0xa7 FB = 0xb1 static void write_reg (unsigned reg, unsigned val): gpio_clear (SP_PORT, 1 << SPEN) udelay (1) unsigned value = (reg << 8) | (val & 0xff) for unsigned i = 0; i < 16; ++i, value <<= 1: gpio_clear (SP_PORT, 1 << SPCK) if value & 0x8000: gpio_set (SP_PORT, 1 << SPDA) else: gpio_clear (SP_PORT, 1 << SPDA) udelay (4) gpio_set (SP_PORT, 1 << SPCK) udelay (1) gpio_set (SP_PORT, 1 << SPEN) udelay(4) #endif static void reset (): #if defined (TRENDTAC) // Note that the sync pulse is part of the pre-display region. // Vertical timings. unsigned vsync = 20, vpre = 20, vpost = 0 // Horizontal timings. unsigned hsync = 80, hpre = 80, hpost = 0 // One clock pulse per pixel. unsigned extra = 0 // Bits per pixel. unsigned bpp = LCD_CTRL_BPP_16 // Configuration. #define MODE_TFT_GEN 0 #define VSYNC_N (1 << 8) unsigned cfg = MODE_TFT_GEN | VSYNC_N #elif defined (NANONOTE) // Note that the sync pulse is part of the pre-display region. // Vertical timings. unsigned vsync = 1, vpre = 21, vpost = 2 // Horizontal timings. unsigned hsync = 1, hpre = 70, hpost = 686 // 3 bytes per pixel, so for the display area 2 extra clocks are sent. unsigned extra = 2 // Bits per pixel. unsigned bpp = LCD_CTRL_BPP_18_24 // Configuration. unsigned cfg = LCD_CFG_MODE_SERIAL_TFT | LCD_CFG_HSP | LCD_CFG_VSP // Set up SPI pins. gpio_as_output(SP_PORT, (1 << SPEN) | (1 << SPCK) | (1 << SPDA)) gpio_set (SP_PORT, (1 << SPEN) | (1 << SPCK)) #else #error unknown board #endif // Note that the sync pulse is part of the pre-display region. unsigned vps = 0, vpe = vps + vsync, vds = vps + vpre, vde = vds + v, vt = vde + vpost unsigned hps = 0, hpe = hps + hsync, hds = hps + hpre, hde = hds + h, ht = hde + hpost LCD_CFG = cfg LCD_HSYNC = (hps << 16) | hpe LCD_VSYNC = (vps << 16) | vpe LCD_VAT = (ht << 16) | vt LCD_DAH = (hds << 16) | hde LCD_DAV = (vds << 16) | vde LCD_CTRL = (bpp << LCD_CTRL_BPP_BIT) | LCD_CTRL_BST_16 cpm_stop_lcd () unsigned pixclock = fps * (ht + extra * h) * vt #if defined (TRENDTAC) unsigned pllout = cpm_get_pllout () CPM_CFCR2 = pllout / pixclock - 1 unsigned val = pllout / (pixclock * 4) - 1 assert (pllout / (val + 1) <= 150000000) assert (val <= 0xf) cpm_set_lcdclk_div (val) CPM_CFCR |= CPM_CFCR_UPE #elif defined (NANONOTE) unsigned val = cpm_get_pllout2 () / pixclock - 1 kdebug_num (val) kdebug ("\n") assert (val < 0x400) cpm_set_pixdiv (val); val = cpm_get_pllout () / (pixclock * 3) assert (val < 0x20) cpm_set_ldiv (val) // Update dividers. CPM_CPCCR |= CPM_CPCCR_CE #endif cpm_start_lcd () LCD_DA0 = physical_descriptor lcd_set_ena () //lcd_enable_eof_intr () #ifdef NANONOTE // Reset registers. write_reg (BACKLIGHT1, 0) // Enable display. write_reg (BACKLIGHT1, 0x5f) #endif static void putchar (unsigned x, unsigned y, unsigned ch, unsigned fg = 0xffff, unsigned bg = 0x0000): if ch < 32 || ch > 126: ch = 127 ch -= 32 unsigned lookup[2] = { bg, fg } for unsigned k = 0; k < 6; ++k: for unsigned r = 0; r < 8; ++r: LCD_FRAMEBUFFER_BASE[(y * 8 + r) * h + x * 6 + k] = lookup[charset[ch][k] & (1 << r) ? 1 : 0] static unsigned log_x = 1, log_y = 1 static void inc_logx (): if ++log_x >= h / 6: log_x = 1 if ++log_y >= v / 8: log_y = 1 static void log_char (unsigned ch): switch ch: case '\n': while log_x < h / 6: putchar (log_x++, log_y, ' ') inc_logx () break default: putchar (log_x, log_y, ch) inc_logx () static void log_str (char const *str): while *str: log_char (*str++) static void log_num (Kernel::Num n): char const *encode = "0123456789abcdef" log_char ('[') for unsigned i = 0; i < 8; ++i: log_char (encode[(n.h >> (4 * (7 - i))) & 0xf]) log_char (' ') for unsigned i = 0; i < 8; ++i: log_char (encode[(n.l >> (4 * (7 - i))) & 0xf]) log_char (']') static void log_msg (): log_str ("prot:") log_num (Kernel::recv.protected_data) log_str ("data:") for unsigned i = 0; i < 2; ++i: log_num (Kernel::recv.data[i]) log_char ('\n') enum captype: LOG SET_EOF_CB Kernel::Num start (): map_lcd () map_cpm () #ifdef NANONOTE map_gpio () #endif Descriptor descriptor __attribute__ ((aligned (16))) unsigned pages = (frame_size + ~PAGE_MASK) >> PAGE_BITS unsigned physical = Kernel::my_memory.alloc_range (pages) assert (physical & PAGE_MASK && ~physical) for unsigned i = 0; i < pages; ++i: Kernel::Page p = Kernel::my_memory.create_page () p.alloc_physical (physical + i * PAGE_SIZE, false, true) Kernel::my_memory.map (p, (unsigned)LCD_FRAMEBUFFER_BASE + i * PAGE_SIZE) Kernel::free_cap (p) for unsigned y = 0; y < v; ++y: unsigned g = (y << 8) / v for unsigned x = 0; x < h; ++x: unsigned r = (x << 8) / h unsigned b = ((x + y) << 8) / (h + v) #if defined (TRENDTAC) LCD_FRAMEBUFFER_BASE[y * h + x] = ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3) #elif defined (NANONOTE) LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 2] = r LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 1] = g LCD_FRAMEBUFFER_BASE[(y * h + x) * Bpp + 0] = b #else #error "Define your framebuffer format." #endif Kernel::Page p = Kernel::my_memory.mapping (&descriptor) unsigned paddr = p.physical_address () physical_descriptor = paddr + ((unsigned)&descriptor & ~PAGE_MASK) Kernel::free_cap (p) descriptor.next = physical_descriptor descriptor.frame = physical descriptor.id = 0xdeadbeef descriptor.cmd = LCD_CMD_EOFINT | ((frame_size / 4) << LCD_CMD_LEN_BIT) unsigned dptr = (unsigned)&descriptor __asm__ volatile ("lw $a0, %0\ncache 0x15, 0($a0)" :: "m"(dptr) : "memory", "a0") reset () Kernel::Cap logcap = Kernel::my_receiver.create_capability (LOG) #if defined (TRENDTAC) __asm__ volatile ("li $a0, 1\nlw $a1, %0\nbreak" :: "m"(logcap.code): "a0", "a1", "memory") #endif Kernel::Cap eof_cb bool have_eof = false while true: Kernel::wait () //log_msg () switch Kernel::recv.protected_data.l: case IRQ_LCD: lcd_clr_eof () eof_cb.invoke () break case SET_EOF_CB: if have_eof: Kernel::free_cap (eof_cb) else: have_eof = true eof_cb = Kernel::get_arg () Kernel::Cap reply = Kernel::get_reply () Kernel::register_interrupt (IRQ_LCD) reply.invoke () Kernel::free_cap (reply) break case LOG: log_char (Kernel::recv.data[0].l) break default: log_char ('~') break