1
0
mirror of git://projects.qi-hardware.com/iris.git synced 2024-11-17 07:45:18 +02:00
iris/mips/nanonote/stage1.ld
2015-11-19 01:06:57 -05:00

24 lines
507 B
Plaintext

OUTPUT_ARCH(mips)
ENTRY(__start)
MEMORY
{
ram : ORIGIN = 0x80003000 , LENGTH = 0x800
}
SECTIONS
{
/* Start with the part containing the interrupt and exception code. */
.text : { mips/board/mips_board_stage1_elf-stage1.o(.text*) } > ram
.text : { *(.text*) } > ram
.rodata : { *(.rodata*) *(.note*) } > ram
.sdata : { *(.sdata*) } > ram
.data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram
_gp = ABSOLUTE(.);
.got : { *(.got*) } > ram
.sbss : { *(.sbss*) } > ram
.bss : { *(.bss*) } > ram
}