1
0
mirror of git://projects.qi-hardware.com/iris.git synced 2024-07-02 20:14:11 +03:00
iris/mips.ccp
Bas Wijnen 12637f5695 more
2009-05-22 22:48:49 +02:00

102 lines
3.0 KiB
COBOL

#pypp 0
#define ARCH
#include "kernel.hh"
void Thread_arch_init (Thread *thread):
thread->arch.at = 0
thread->arch.v0 = 0
thread->arch.v1 = 0
thread->arch.a0 = 0
thread->arch.a1 = 0
thread->arch.a2 = 0
thread->arch.a3 = 0
thread->arch.t0 = 0
thread->arch.t1 = 0
thread->arch.t2 = 0
thread->arch.t3 = 0
thread->arch.t4 = 0
thread->arch.t5 = 0
thread->arch.t6 = 0
thread->arch.t7 = 0
thread->arch.t8 = 0
thread->arch.t9 = 0
thread->arch.gp = 0
thread->arch.fp = 0
thread->arch.ra = 0
thread->arch.hi = 0
thread->arch.lo = 0
thread->arch.k0 = 0
thread->arch.k1 = 0
void Memory_arch_init (Memory *mem):
++g_asid
if g_asid > 0x3f:
g_asid = 1
mem->arch.asid = g_asid
mem->arch.directory = NULL
void Memory_arch_free (Memory *mem):
if !mem->arch.directory:
return
for unsigned i = 0; i < PAGE_SIZE; ++i:
unsigned *table = mem->arch.directory[i]
if !table:
continue
for unsigned j = 0; j < PAGE_SIZE; ++j:
Page *page = (Page *)(table[j] & ~3)
if !page:
continue
mem->unmap (page, i * 0x1000 * 0x400 + j * 0x1000)
mem->unuse ()
mem->zfree ((unsigned)table)
mem->arch.directory[i] = NULL
mem->unuse ()
mem->zfree ((unsigned)mem->arch.directory)
bool Memory_arch_map (Memory *mem, Page *page, unsigned address, bool write):
unsigned *table = mem->arch.directory[(unsigned)address >> 22]
if !table:
table = (unsigned *)mem->zalloc ()
if !table:
return false
mem->arch.directory[(unsigned)address >> 22] = table
unsigned idx = ((unsigned)address >> 12) & ((1 << 10) - 1)
if table[idx]:
mem->unmap ((Page *)(table[idx] & ~3), address)
table[idx] = write ? (unsigned)page : (unsigned)page + 1
void Memory_arch_unmap (Memory *mem, Page *page, unsigned address):
unsigned *table = mem->arch.directory[(unsigned)address >> 22]
table[((unsigned)address >> 12) & ((1 << 10) - 1)] = 0
Page *Memory_arch_get_mapping (Memory *mem, unsigned address):
unsigned *table = mem->arch.directory[(unsigned)address >> 22]
unsigned v = table[((unsigned)address >> 12) & ((1 << 10) - 1)]
void Thread_arch_invoke ():
Capability *target, *c0, *c1, *c2, *c3
if current:
target = current->address_space->find_capability (current->arch.v0)
else:
target = NULL
if !target:
// TODO: there must be no action here. This is just because the rest doesn't work yet.
if current:
led (current->arch.a0, current->arch.a1, current->arch.a2)
dbg_sleep (1000)
schedule ()
return
c0 = current->address_space->find_capability (current->arch.a0)
c1 = current->address_space->find_capability (current->arch.a1)
c2 = current->address_space->find_capability (current->arch.a2)
c3 = current->address_space->find_capability (current->arch.a3)
target->invoke (current->arch.t0, current->arch.t1, current->arch.t2, current->arch.t3, c0, c1, c2, c3)
void arch_schedule (Thread *previous, Thread *target):
if target:
cp0_set (CP0_ENTRY_HI, target->address_space->arch.asid)
else:
// The idle tasks asid is 0.
cp0_set (CP0_ENTRY_HI, 0)
// TODO: flush TLB if the asid is already taken.