mirror of
git://projects.qi-hardware.com/iris.git
synced 2024-07-02 22:26:43 +03:00
150 lines
4.1 KiB
Plaintext
150 lines
4.1 KiB
Plaintext
#pypp 0
|
|
#ifndef _ARCH_HH
|
|
#define _ARCH_HH
|
|
|
|
#ifdef ARCH
|
|
#define reg_hack(x...) #x
|
|
#define cp0_get(reg, target) do { __asm__ volatile ("mfc0 %0, $" reg_hack(reg) : "=r" (target)); } while (0)
|
|
#define cp0_set(reg, value) do { __asm__ volatile ("mtc0 %0, $" reg_hack(reg) :: "r" (value)); } while (0)
|
|
#define cp0_set0(reg) do { __asm__ volatile ("mtc0 $zero, $" reg_hack(reg)); } while (0)
|
|
|
|
// cp0 registers.
|
|
#define CP0_INDEX 0
|
|
#define CP0_RANDOM 1
|
|
#define CP0_ENTRY_LO0 2
|
|
#define CP0_ENTRY_LO1 3
|
|
#define CP0_CONTEXT 4
|
|
#define CP0_PAGE_MASK 5
|
|
#define CP0_WIRED 6
|
|
#define CP0_BAD_V_ADDR 8
|
|
#define CP0_COUNT 9
|
|
#define CP0_ENTRY_HI 10
|
|
#define CP0_COMPARE 11
|
|
#define CP0_STATUS 12
|
|
#define CP0_CAUSE 13
|
|
#define CP0_EPC 14
|
|
#define CP0_P_R_ID 15
|
|
#define CP0_CONFIG 16
|
|
#define CP0_CONFIG1 16, 1
|
|
#define CP0_CONFIG2 16, 2
|
|
#define CP0_CONFIG3 16, 3
|
|
#define CP0_L_L_ADDR 17
|
|
#define CP0_WATCH_LO 18
|
|
#define CP0_WATCH_HI 19
|
|
#define CP0_DEBUG 23
|
|
#define CP0_DEPC 24
|
|
#define CP0_PERF_CNT 25
|
|
#define CP0_ERR_CTL 26
|
|
#define CP0_CACHE_ERR 27
|
|
#define CP0_TAG_LO 28, 0
|
|
#define CP0_DATA_LO 28, 1
|
|
#define CP0_TAG_HI 29, 0
|
|
#define CP0_DATA_HI 29, 1
|
|
#define CP0_ERROR_EPC 30
|
|
#define CP0_DESAVE 31
|
|
#endif
|
|
|
|
#define PAGE_BITS (12)
|
|
#define PAGE_SIZE (1 << PAGE_BITS)
|
|
#define PAGE_MASK (~(PAGE_SIZE - 1))
|
|
|
|
// register save positions in Thread
|
|
#define SAVE_PC (5 * 4)
|
|
#define SAVE_SP (SAVE_PC + 4)
|
|
#define SAVE_AT (SAVE_SP + 4)
|
|
#define SAVE_V0 (SAVE_AT + 4)
|
|
#define SAVE_V1 (SAVE_V0 + 4)
|
|
#define SAVE_A0 (SAVE_V1 + 4)
|
|
#define SAVE_A1 (SAVE_A0 + 4)
|
|
#define SAVE_A2 (SAVE_A1 + 4)
|
|
#define SAVE_A3 (SAVE_A2 + 4)
|
|
#define SAVE_T0 (SAVE_A3 + 4)
|
|
#define SAVE_T1 (SAVE_T0 + 4)
|
|
#define SAVE_T2 (SAVE_T1 + 4)
|
|
#define SAVE_T3 (SAVE_T2 + 4)
|
|
#define SAVE_T4 (SAVE_T3 + 4)
|
|
#define SAVE_T5 (SAVE_T4 + 4)
|
|
#define SAVE_T6 (SAVE_T5 + 4)
|
|
#define SAVE_T7 (SAVE_T6 + 4)
|
|
#define SAVE_T8 (SAVE_T7 + 4)
|
|
#define SAVE_T9 (SAVE_T8 + 4)
|
|
#define SAVE_S0 (SAVE_T9 + 4)
|
|
#define SAVE_S1 (SAVE_S0 + 4)
|
|
#define SAVE_S2 (SAVE_S1 + 4)
|
|
#define SAVE_S3 (SAVE_S2 + 4)
|
|
#define SAVE_S4 (SAVE_S3 + 4)
|
|
#define SAVE_S5 (SAVE_S4 + 4)
|
|
#define SAVE_S6 (SAVE_S5 + 4)
|
|
#define SAVE_S7 (SAVE_S6 + 4)
|
|
#define SAVE_GP (SAVE_S7 + 4)
|
|
#define SAVE_FP (SAVE_GP + 4)
|
|
#define SAVE_RA (SAVE_FP + 4)
|
|
#define SAVE_HI (SAVE_RA + 4)
|
|
#define SAVE_LO (SAVE_HI + 4)
|
|
#define SAVE_K0 (SAVE_LO + 4)
|
|
#define SAVE_K1 (SAVE_K0 + 4)
|
|
|
|
#ifndef ASM
|
|
|
|
struct Thread_arch:
|
|
unsigned at, v0, v1, a0, a1, a2, a3
|
|
unsigned t0, t1, t2, t3, t4, t5, t6, t7, t8, t9
|
|
unsigned s0, s1, s2, s3, s4, s5, s6, s7
|
|
unsigned gp, fp, ra, hi, lo, k0, k1
|
|
|
|
// The following is used for page mapping.
|
|
// Each Memory has a two directories with 0x400 entries,
|
|
// page tables and mapping page tables. Mapping page tables are
|
|
// pages which contain 0x200 EntryLo. values and 0x200 Page pointers.
|
|
// For a virtual address, bits 0-11 are in the physical address,
|
|
// bits 12-20 are an index in the page table, bits 21-30
|
|
// are an index in the page directory and bit 31 is always 0.
|
|
|
|
struct arch_page : public Object <arch_page> :
|
|
Page *page
|
|
unsigned mapping
|
|
arch_page *prev_mapped, *next_mapped
|
|
|
|
struct arch_page_table : public Object <arch_page_table> :
|
|
arch_page *first_page
|
|
|
|
struct Page_arch:
|
|
arch_page *first_mapped
|
|
|
|
struct Memory_arch:
|
|
unsigned asid
|
|
unsigned **directory
|
|
arch_page_table **shadow
|
|
arch_page_table *first_page_table
|
|
|
|
// Pointers to Memory when asid is taken, index of next free, or 0, if free.
|
|
// asid[0] is used as index to first free asid.
|
|
EXTERN unsigned asids[64]
|
|
EXTERN Receiver *arch_interrupt_receiver[8]
|
|
|
|
// Functions which can be called from assembly must not be mangled.
|
|
extern "C":
|
|
// Kernel entry points, called from entry.S.
|
|
Thread *interrupt ()
|
|
Thread *cache_error ()
|
|
Thread *exception ()
|
|
Thread *tlb_refill ()
|
|
|
|
#ifdef INIT
|
|
// Initialize most things (the rest is done in boot.S)
|
|
void init ()
|
|
// Start running the idle task for the first time.
|
|
void run_idle (Thread *self)
|
|
#endif
|
|
|
|
// These are "extern", not "EXTERN", because they really are defined elsewhere.
|
|
#ifdef INIT
|
|
extern unsigned thread_start[NUM_THREADS + 1]
|
|
#endif
|
|
// Fast pointer to page directory, for tlb miss events
|
|
extern unsigned **directory
|
|
|
|
#endif // defined ASM
|
|
|
|
#endif
|