mirror of
git://projects.qi-hardware.com/iris.git
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126 lines
3.9 KiB
COBOL
126 lines
3.9 KiB
COBOL
#pypp 0
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#include "kernel.hh"
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static void init_idle ():
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// initialize idle task as if it is currently running.
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idle.size = sizeof (Thread)
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idle.prev = NULL
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idle.next = NULL
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idle.thread_prev = NULL
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idle.thread_next = NULL
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idle.schedule_prev = NULL
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idle.schedule_next = NULL
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idle.address_space = &idle_memory
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// initialize idle_memory.
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idle_memory.size = sizeof (Memory)
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idle_memory.prev = NULL
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idle_memory.next = NULL
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idle_memory.memory_prev = NULL
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idle_memory.memory_next = NULL
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idle_memory.pages = &idle_page
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idle_memory.threads = &idle
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idle_memory.memories = NULL
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idle_memory.limit = 0
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idle_memory.used = 0
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idle_memory.cpu.directory = (Page ***)0x80000000
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idle_memory.cpu.asid = 0
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// initialize idle_page
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idle_page.size = sizeof (Page)
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idle_page.prev = NULL
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idle_page.next = NULL
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idle_page.page_prev = NULL
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idle_page.page_next = NULL
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// Not an error, this is really physical page 0.
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idle_page.physical = 0
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static void init_cp0 ():
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// Set timer to a defined value (11 is Compare)
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__asm__ volatile ("mtc0 %0, $11, 0" :: "r"(1000000))
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// Reset timer (9 is Count)
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__asm__ volatile ("mtc0 $zero, $9, 0")
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// Use the interrupt vector for interrupts (13 is Cause)
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__asm__ volatile ("mtc0 %0, $13" :: "r"(1 << 23))
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// clear the tlb, hardwire page 0 to 0xffffffff
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// and soft-wire it to (0x294 << 20) + (0x290 << 10)
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// (for the idle task).
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// 6 is Wired.
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__asm__ volatile ("mtc0 %0, $6" :: "r"(1))
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// 5 is PageMask.
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__asm__ volatile ("mtc0 $zero, $5")
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// 2 is EntryLo0.
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__asm__ volatile ("mtc0 $zero, $2")
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// 3 is EntryLo1.
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__asm__ volatile ("mtc0 $zero, $3")
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// Get number of tlb entries (is 31).
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unsigned num;
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__asm__ volatile ("mfc0 %0, $16, 1" : "=r"(num))
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num >>= 25
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num &= 0x3f
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// Clear the tlb.
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#if 0
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for unsigned i = 1; i < num; ++i:
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// this address doesn't reach the tlb, so it can't trigger exceptions.
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// 10 is EntryHi
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__asm__ volatile ("mtc0 %0, $10" :: "r"(0x70000000 + 0x1000 * i))
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// 0 is Index.
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__asm__ volatile ("mtc0 %0, $0" :: "r"(i))
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// write the data.
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__asm__ volatile ("tlbwi")
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#endif
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// Fill the upper page in kseg3.
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__asm__ volatile ("mtc0 %0, $10" :: "r"(0xfffff000))
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__asm__ volatile ("mtc0 %0, $2" :: "r"(0x0000001d))
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__asm__ volatile ("mtc0 %0, $3" :: "r"(0x0000001f))
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__asm__ volatile ("mtc0 %0, $0" :: "r"(0))
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__asm__ volatile ("tlbwi")
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// Fill the idle task's page in useg. Set it to non-cachable.
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__asm__ volatile ("mtc0 %0, $10" :: "r"(0x284a0000))
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__asm__ volatile ("mtc0 %0, $2" :: "r"(0x00000016))
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__asm__ volatile ("mtc0 %0, $3" :: "r"(0x00000014))
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__asm__ volatile ("tlbwr")
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// Allow eret to be used to jump to the idle task.
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// 14 is EPC.
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__asm__ volatile ("mtc0 %0, $14" :: "r"(0x284a0288))
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// Enable all interrupts and say we're handling an exception.
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// 12 is Status.
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__asm__ volatile ("mtc0 %0, $12" :: "r"(0x1000ff13))
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/// Initialize the kernel, finish by falling into the idle task.
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extern unsigned _end
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void init ():
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// Initialize kernel variables to empty.
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sleepers = NULL
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runners = NULL
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zero_pages = NULL
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// Fill junk pages with all memory not currently used.
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junk_pages = (FreePage *)(((unsigned)&_end + (1 << 12) - 1) & ~((1 << 12) - 1))
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FreePage *p, *next
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unsigned count = 1
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for p = junk_pages, next = p; (unsigned)next - 0x80000000 < (1 << 27); p = next, next = (FreePage *)((unsigned)p + (1 << 12)):
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p->next = next
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++count
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p->next = NULL
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// initialize system control coprocessor.
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init_cp0 ()
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// initialize everything about the idle task.
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init_idle ()
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// initialize top_memory.
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top_memory.size = sizeof (Memory)
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top_memory.prev = NULL
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top_memory.next = NULL
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top_memory.memory_prev = NULL
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top_memory.memory_next = NULL
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top_memory.pages = NULL
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top_memory.threads = NULL
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top_memory.memories = NULL
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top_memory.limit = count
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top_memory.used = 0
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top_memory.cpu.directory = NULL
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top_memory.cpu.asid = 0
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// TOOO: set up initial threads.
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// Done; return to user space (the idle task).
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__asm__ volatile ("eret")
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