mirror of
git://projects.qi-hardware.com/iris.git
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322 lines
9.3 KiB
COBOL
322 lines
9.3 KiB
COBOL
#pypp 0
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// Iris: micro-kernel for a capability-based operating system.
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// mips/interrupts.ccp: Functions called by mips/entry.S.
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// Copyright 2009 Bas Wijnen <wijnen@debian.org>
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define ARCH
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#include "../kernel.hh"
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typedef unsigned cacheline[8]
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void arch_flush_cache ():
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for cacheline *line = (cacheline *)0x80000000; line < (cacheline *)0x80008000; ++line:
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__asm__ volatile ("lw $k0, %0; cache 0, 0($k0); cache 1, 0($k0)" :: "m"(line))
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static kThread *handle_exit ():
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dbg_check ()
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--dbg_code.h
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// Set must_wait to false, so random threads are not set to waiting when the kernel invokes something (such as a dbg_cap).
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must_wait = false
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if !current || (current == &idle):
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schedule ()
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if !current:
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current = &idle
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if (current->flags & (Iris::Thread::RUNNING | Iris::Thread::WAITING)) != Iris::Thread::RUNNING:
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panic (current->flags, "non-scheduled thread running")
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if old_current == current:
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return current
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arch_flush_cache ()
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if current != &idle:
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if (kMemory *)asids[current->address_space->arch.asid] != current->address_space:
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if asids[0]:
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current->address_space->arch.asid = asids[0]
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asids[0] = asids[asids[0]]
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else:
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static unsigned random = 1
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current->address_space->arch.asid = random
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// Overwrite used asid, so flush those values from tlb.
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flush_tlb (random)
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++random
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if random >= 64:
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random = 1
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asids[current->address_space->arch.asid] = (unsigned)current->address_space
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cp0_set (CP0_ENTRY_HI, current->address_space->arch.asid)
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directory = current->address_space->arch.directory
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if current->flags & Iris::Thread::PRIV:
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cp0_set (CP0_STATUS, 0x1000ff13)
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else:
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cp0_set (CP0_STATUS, 0x0000ff13)
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dbg_push ((unsigned)current)
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dbg_push (current->pc)
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return current
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/// A TLB miss has occurred. This is the slow version. It is only used
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/// when k0 or k1 is not 0, or when an error occurs.
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/// Otherwise, the ultra-fast code in entry.S is used.
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kThread *tlb_refill ():
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++dbg_code.h
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old_current = current
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if !directory:
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (Iris::ERR_NO_PAGE_DIRECTORY, addr)
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return handle_exit ()
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unsigned EntryHi
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cp0_get (CP0_ENTRY_HI, EntryHi)
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Table *t = directory[EntryHi >> 21]
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if !t:
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (Iris::ERR_NO_PAGE_TABLE, addr)
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else:
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// - 2 instead of - 1 means reset bit 0
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unsigned idx = (EntryHi >> 12) & ((1 << 9) - 2)
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cp0_set (CP0_ENTRY_LO0, t->entrylo[idx])
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cp0_set (CP0_ENTRY_LO1, t->entrylo[idx + 1])
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__asm__ volatile ("tlbwr")
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if dbg_code.l:
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kdebug ("tlb refill ")
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__asm__ volatile ("tlbp")
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unsigned index
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cp0_get (CP0_INDEX, index)
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kdebug_num (index, 2)
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kdebug ("|")
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kdebug_num (t->entrylo[idx])
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kdebug (":")
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kdebug_num (t->entrylo[idx + 1])
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kdebug (" for ")
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kdebug_num (EntryHi)
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kdebug ("\n")
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return handle_exit ()
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/// An interrupt which is not an exception has occurred.
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kThread *interrupt ():
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++dbg_code.h
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old_current = current
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unsigned ipr = INTC_IPR
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for unsigned i = 0; i < 32; ++i:
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if ipr & (1 << i):
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// Handle timer interrupts specially: don't disable them.
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if i == TIMER_INTERRUPT:
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continue
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//if i != 0x18:
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//kdebug ("interrupt: ")
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//kdebug_num (i, 2)
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//kdebug ("\n")
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// Disable the interrupt while handling it.
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intc_mask_irq (i)
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intc_ack_irq (i)
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// Send message to interrupt handler.
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if arch_interrupt_receiver[i]:
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kCapability::Context c
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for unsigned j = 0; j < 2; ++j:
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c.data[j] = 0
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arch_interrupt_receiver[i]->send_message (i, &c)
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arch_interrupt_receiver[i] = NULL
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if ipr & (1 << TIMER_INTERRUPT):
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#if defined (TRENDTAC)
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ost_clear_uf (0)
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#elif defined (NANONOTE)
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tcu_clear_full_match_flag (0)
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#else
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#error unknown board
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#endif
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intc_ack_irq (TIMER_INTERRUPT)
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timer_interrupt ()
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return handle_exit ()
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void flush_tlb (unsigned asid):
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for unsigned tlb = 1; tlb < 32; ++tlb:
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cp0_set (CP0_INDEX, tlb)
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__asm__ volatile ("tlbr")
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unsigned hi
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cp0_get (CP0_ENTRY_HI, hi)
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if (hi & 0x1f) == asid:
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// Set asid to 0, which is only used by the idle task.
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cp0_set (CP0_ENTRY_HI, 0x2000 * tlb)
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__asm__ volatile ("tlbwi")
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static void arch_invoke ():
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kCapRef target = old_current->find_capability (old_current->arch.v[0], &must_wait)
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do_schedule = false
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kCapability::Context msg
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if must_wait:
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old_current->recv_reply = old_current->arch.t[2]
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old_current->recv_arg = old_current->arch.t[3]
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//kdebug_num (old_current->recv_reply)
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//kdebug ("/")
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//kdebug_num (old_current->recv_arg)
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//kdebug ("\n")
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if !target.valid ():
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if must_wait:
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old_current->wait ()
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else:
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dpanic (target.index, "invalid target called")
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return
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msg.reply = old_current->find_capability (old_current->arch.t[0], &msg.copy[0])
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msg.arg = old_current->find_capability (old_current->arch.t[1], &msg.copy[1])
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msg.data[0] = Iris::Num (old_current->arch.a[0], old_current->arch.a[1])
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msg.data[1] = Iris::Num (old_current->arch.a[2], old_current->arch.a[3])
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target->invoke (&msg)
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if do_schedule && !must_wait:
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// If the call was to schedule without wait, it isn't done yet.
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schedule ()
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else if old_current != current && old_current && (old_current->flags & (Iris::Thread::RUNNING | Iris::Thread::WAITING)) == Iris::Thread::RUNNING:
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// If the caller received an immediate reply from the kernel, it is no longer set as current. Don't let it lose its timeslice.
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current = old_current
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/// A general exception has occurred.
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kThread *exception ():
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++dbg_code.h
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old_current = current
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unsigned cause
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cp0_get (CP0_CAUSE, cause)
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switch (cause >> 2) & 0x1f:
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case 0:
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// Interrupt. This shouldn't happen, since CAUSE[IV] == 1.
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panic (0, "Interrupt on exception vector.")
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break
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case 1:
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// TLB modification.
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (Iris::ERR_WRITE_DENIED, addr)
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break
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case 2:
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// TLB load or instruction fetch.
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (Iris::ERR_UNMAPPED_READ, addr)
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break
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case 3:
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// TLB store.
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (Iris::ERR_UNMAPPED_WRITE, addr)
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break
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case 4:
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// Address error load or instruction fetch.
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (Iris::ERR_INVALID_ADDRESS_READ, addr)
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break
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case 5:
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// Address error store.
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unsigned addr
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cp0_get (CP0_BAD_V_ADDR, addr)
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current->raise (Iris::ERR_INVALID_ADDRESS_WRITE, addr)
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break
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case 6:
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// Bus error instruction fetch.
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panic (0, "Bus error instruction fetch.")
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break
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case 7:
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// Bus error load or store.
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panic (0, "Bus error load or store.")
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break
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case 8:
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// Syscall.
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current->pc += 4
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arch_invoke ()
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//check (0x88392883, "check error")
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break
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case 9:
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// Breakpoint.
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#if 0 || defined (NDEBUG)
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//current->raise (Iris::ERR_BREAKPOINT, 0)
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#ifndef NDEBUG
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current->pc += 4
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#endif
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#else
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unsigned opcode = *(unsigned *)current->pc
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if opcode == 0x0007000d:
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panic (0, "Division by zero (detected by compiler)")
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current->pc += 4
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if current->arch.a[0]:
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if dbg_cap.valid ():
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dpanic (0, "Break instruction while log capability was already set")
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break
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bool dummy
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dbg_cap = current->find_capability (current->arch.a[1], &dummy)
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if !dbg_cap.valid ():
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dpanic (0, "no log capability provided")
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break
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kdebug ("log capability registered.\n")
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break
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kdebug (current->arch.a[1])
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#endif
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break
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case 10:
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// Reserved instruction.
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current->raise (Iris::ERR_RESERVED_INSTRUCTION, 0)
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break
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case 11:
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// Coprocessor unusable.
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current->raise (Iris::ERR_COPROCESSOR_UNUSABLE, 0)
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break
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case 12:
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// Arithmetic overflow.
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current->raise (Iris::ERR_OVERFLOW, 0)
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break
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case 13:
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// Trap.
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current->raise (Iris::ERR_TRAP, 0)
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break
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case 15:
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// Floating point exception.
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panic (0xe1223344, "Floating point exception.")
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break
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case 23:
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// Reference to WatchHi/WatchLo address.
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cp0_set0 (CP0_WATCH_LO)
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current->raise (Iris::ERR_WATCHPOINT, 0)
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break
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case 24:
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// Machine check.
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panic (0xf3223344, "Machine check.")
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break
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case 30:
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// Cache error (EJTAG only).
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panic (0xf4223344, "Cache error (EJTAG only).")
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break
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case 14:
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case 16:
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case 17:
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case 18:
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case 19:
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case 20:
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case 21:
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case 22:
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case 25:
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case 26:
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case 27:
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case 28:
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case 29:
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case 31:
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// Reserved.
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panic (0xf5223344, "Reserved exception code")
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break
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default:
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panic (0xf6223344, "Impossible exception code")
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break
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return handle_exit ()
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/// There's a cache error. Big trouble. Probably not worth trying to recover.
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kThread *cache_error ():
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++dbg_code.h
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panic (0x33333333, "cache error")
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old_current = current
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return handle_exit ()
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