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iris/mips/boot.S
2009-09-27 10:23:33 +02:00

72 lines
1.8 KiB
ArmAsm

// Iris: micro-kernel for a capability-based operating system.
// mips/trendtac/boot.S: Kernel entry point, called by the boot loader.
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <http://www.gnu.org/licenses/>.
#define ASM
#define ARCH
#include "arch.hh"
// The kernel stack.
.lcomm kernel_stack, KERNEL_STACK_SIZE
.globl __start
.set noreorder
// Note that this code starts at 0xa0000000, even though it is linked for
// 0x80000000. This means that until the jump below, it must be PIC.
__start:
bal 1f
// For some reason the disassembler considers everything
// after __start non-code until the next label. So I add a label.
start_hack_for_disassembler:
nop
.word _gp
1: lw $gp, 0($ra)
la $sp, kernel_stack + KERNEL_STACK_SIZE
// Flush cache.
lui $v1, 0x8000
ori $v0, $v1, 0x8000
1:
cache 0, 0($v1)
cache 1, 0($v1)
bne $v1, $v0, 1b
addiu $v1, $v1, 32
// Set kseg0 cachable.
li $k0, 0x3
mtc0 $k0, $CP0_CONFIG, 0
// Jump into cached code.
la $t9, 1f
jr $t9
nop
1:
// From here, the code no longer needs to be PIC.
// Clear .bss
la $a0, _edata
la $a1, _end
1: sw $zero, 0($a0)
bne $a1, $a0, 1b
addu $a0, 4
// First argument is the memory size.
la $t9, init
jr $t9
li $a0, MEMORY_SIZE