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iris/boot.S
Bas Wijnen f800bc51be more
2009-05-23 20:55:31 +02:00

52 lines
814 B
ArmAsm

// The kernel stack.
.lcomm kernel_stack, KERNEL_STACK_SIZE
.globl __start
.globl thread_start
.set noreorder
#define Status 12
#define Config 16
__start:
bal 1f
nop
.word _gp
// For some reason the disassembler considers everything
// after __start non-code until the next label. So I add a label.
start_hack_for_disassembler:
1: lw $gp, 0($ra)
la $sp, kernel_stack + KERNEL_STACK_SIZE
// Disable interrupts during bootstrap.
mtc0 $zero, $Status
// TODO: flush cache and optionally refill it.
// Set kseg0 cachable.
li $k0, 0x3
mtc0 $k0, $Config, 0
// Jump into cached code.
la $t9, 1f
jr $t9
nop
1:
// Clear .bss
la $a0, _edata
la $a1, _end
1: sw $zero, 0($a0)
bne $a1, $a0, 1b
addu $a0, 4
la $t9, init
jr $t9
nop
thread_start:
.word thread0
.word thread1
.word thread2