mirror of
git://projects.qi-hardware.com/iris.git
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69 lines
1.6 KiB
ArmAsm
69 lines
1.6 KiB
ArmAsm
// Iris: micro-kernel for a capability-based operating system.
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// mips/boot.S: Kernel entry point, called by the boot loader.
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// Copyright 2009 Bas Wijnen <wijnen@debian.org>
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// The kernel stack.
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.lcomm kernel_stack, KERNEL_STACK_SIZE
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.globl __start
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.globl thread_start
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.set noreorder
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#define Status 12
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#define Config 16
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__start:
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bal 1f
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nop
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.word _gp
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// For some reason the disassembler considers everything
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// after __start non-code until the next label. So I add a label.
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start_hack_for_disassembler:
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1: lw $gp, 0($ra)
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la $sp, kernel_stack + KERNEL_STACK_SIZE
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// Disable interrupts during bootstrap.
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mtc0 $zero, $Status
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// TODO: flush cache and optionally refill it.
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// Set kseg0 cachable.
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li $k0, 0x3
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mtc0 $k0, $Config, 0
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// Jump into cached code.
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la $t9, 1f
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jr $t9
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nop
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1:
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// Clear .bss
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la $a0, _edata
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la $a1, _end
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1: sw $zero, 0($a0)
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bne $a1, $a0, 1b
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addu $a0, 4
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la $t9, init
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jr $t9
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nop
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thread_start:
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.word thread0
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.word thread1
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.word thread2
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