From 8d40b38af36b9d44ab5f608f94864d8798ee02b1 Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Sat, 9 Jun 2012 20:07:52 -0300 Subject: [PATCH 1/6] modules/Makefile (MODULES): add bat-clip-aa-th --- modules/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/modules/Makefile b/modules/Makefile index 20d36d5..cf08229 100644 --- a/modules/Makefile +++ b/modules/Makefile @@ -1,4 +1,5 @@ -MODULES=8_10-card fiducial mini-usb pads qfn qfp sot sot-323 ssop stdpass \ +MODULES=8_10-card bat-clip-aa-th \ + fiducial mini-usb pads qfn qfp sot sot-323 ssop stdpass \ usb-a-pcb usb_a_plug_smt .SUFFIXES: .fpd .mod From 86ce0c06e63c0bbf60ec4011e1543b2d2dfb553f Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Sat, 9 Jun 2012 20:09:36 -0300 Subject: [PATCH 2/6] modules/pads-array.fpd: like pads.fpd, but in a array formations (WIP) For now, it only has the 2 mm pad with a 50 mil raster, suitable for ribbon cables. --- modules/INFO | 3 +++ modules/Makefile | 2 +- modules/pads-array.fpd | 29 +++++++++++++++++++++++++++++ 3 files changed, 33 insertions(+), 1 deletion(-) create mode 100644 modules/pads-array.fpd diff --git a/modules/INFO b/modules/INFO index f38f9cf..83e3067 100644 --- a/modules/INFO +++ b/modules/INFO @@ -111,6 +111,9 @@ F: mini_usb_b # Solder pads and test points F: pads +# "pads" in typical array formations +F: pads-array + # "Generic" simple QFN F: qfn # diff --git a/modules/Makefile b/modules/Makefile index cf08229..d95688d 100644 --- a/modules/Makefile +++ b/modules/Makefile @@ -1,5 +1,5 @@ MODULES=8_10-card bat-clip-aa-th \ - fiducial mini-usb pads qfn qfp sot sot-323 ssop stdpass \ + fiducial mini-usb pads pads-array qfn qfp sot sot-323 ssop stdpass \ usb-a-pcb usb_a_plug_smt .SUFFIXES: .fpd .mod diff --git a/modules/pads-array.fpd b/modules/pads-array.fpd new file mode 100644 index 0000000..f50b1ab --- /dev/null +++ b/modules/pads-array.fpd @@ -0,0 +1,29 @@ +/* MACHINE-GENERATED ! */ + +frame pad { + __0: vec @(x/2, y/2) + __1: vec @(-x/2, -y/2) + rpad "$n" . __0 bare +} + +package "PAD_${name}_${N}x$e" +unit mm + +table + { name, x, y } + { "2mm", 2mm, 0.5mm } + { "60x60", 60mil, 60mil } + { "80x80", 80mil, 80mil } + { "120x60", 120mil, 60mil } + +table + { ?name, e, N } + { "2mm", 50mil, 20 } + { "60x60", 0mm, 1 } + { "80x80", 0mm, 1 } + { "120x60", 0mm, 1 } + +loop n = 1, N + +__0: vec @(0mm, e*(n-1)) +frame pad . From 78640707f40f31f408f159ad88a585e47bb5b2c2 Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Sat, 9 Jun 2012 22:28:58 -0300 Subject: [PATCH 3/6] components/: generate for connectors CONN_1 to CONN_40X2 (in gencon.lib) This creates name collisions with manually created connectors in con.lib, which we may want to resolve. --- components/EXPAND | 81 +++++++++++++++++++++++++++++++++++++++ components/Makefile | 13 +++++-- components/components.pro | 1 + components/gencon.pl | 39 +++++++++++++++++++ 4 files changed, 130 insertions(+), 4 deletions(-) create mode 100755 components/gencon.pl diff --git a/components/EXPAND b/components/EXPAND index 09eb00d..fbd3572 100644 --- a/components/EXPAND +++ b/components/EXPAND @@ -27,6 +27,87 @@ Codec Audio wm9707scft/v Connector + Generated + conn_1 + conn_2 + conn_3 + conn_4 + conn_5 + conn_6 + conn_7 + conn_8 + conn_9 + conn_10 + conn_11 + conn_12 + conn_13 + conn_14 + conn_15 + conn_16 + conn_17 + conn_18 + conn_19 + conn_20 + conn_21 + conn_22 + conn_23 + conn_24 + conn_25 + conn_26 + conn_27 + conn_28 + conn_29 + conn_30 + conn_31 + conn_32 + conn_33 + conn_34 + conn_35 + conn_36 + conn_37 + conn_38 + conn_39 + conn_40 + conn_1x2 + conn_2x2 + conn_3x2 + conn_4x2 + conn_5x2 + conn_6x2 + conn_7x2 + conn_8x2 + conn_9x2 + conn_10x2 + conn_11x2 + conn_12x2 + conn_13x2 + conn_14x2 + conn_15x2 + conn_16x2 + conn_17x2 + conn_18x2 + conn_19x2 + conn_20x2 + conn_21x2 + conn_22x2 + conn_23x2 + conn_24x2 + conn_25x2 + conn_26x2 + conn_27x2 + conn_28x2 + conn_29x2 + conn_30x2 + conn_31x2 + conn_32x2 + conn_33x2 + conn_34x2 + conn_35x2 + conn_36x2 + conn_37x2 + conn_38x2 + conn_39x2 + conn_40x2 Generic TESTPOINT conn_2 diff --git a/components/Makefile b/components/Makefile index 3377813..1724e19 100644 --- a/components/Makefile +++ b/components/Makefile @@ -4,6 +4,8 @@ # Note that we don't have the concept of a "library of everything" so far. # +GEN = gencon.lib + .PHONY: all sch catalog view upload missing clean spotless all: sch @@ -11,13 +13,13 @@ all: sch # @echo "make what ? targets: sch loe" # @exit 1 -sch: +sch: $(GEN) eeschema `pwd`/components.sch DESCR-dcm: *.dcm ../scripts/dcm2desc -L . >$@ || { rm -f $@; exit 1; } -catalog catalog.pdf: EXPAND DESCR-dcm *.lib +catalog catalog.pdf: EXPAND DESCR-dcm *.lib $(GEN) genex -p -L . EXPAND DESCR-dcm >catalog.pdf || \ { rm -f catalog.pdf; exit 1; } @@ -27,9 +29,12 @@ view: catalog.pdf upload: catalog.pdf qippl catalog.pdf tmp/kicad-libs-components.pdf -missing: +missing: $(GEN) ../scripts/missing-in-tree -L . EXPAND +%.lib: %.pl + ./$< >$@ || { rm -f $@; exit 1; } + #loe: # ./mkloe @@ -37,4 +42,4 @@ clean: rm -f DESCR-dcm spotless: clean - rm -f catalog.pdf + rm -f catalog.pdf $(GEN) diff --git a/components/components.pro b/components/components.pro index d40650c..4c24883 100644 --- a/components/components.pro +++ b/components/components.pro @@ -137,3 +137,4 @@ LibName65=./con LibName66=./hole LibName67=./diode LibName68=./powered +LibName69=./gencon diff --git a/components/gencon.pl b/components/gencon.pl new file mode 100755 index 0000000..7918bb9 --- /dev/null +++ b/components/gencon.pl @@ -0,0 +1,39 @@ +#!/usr/bin/perl +# +# gencon.pl - Generate generic connectors +# +# Copyright 2012 by Werner Almesberger +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# + +print "EESchema-LIBRARY Version 2.3 Date: `date`\n"; +print "#encoding utf-8\n"; +for ($x = 1; $x <= 40; $x++) { + for ($y = 1; $y <= 2; $y++) { + $name = "CONN_$x"; + $name .= "X$y" if $y > 1; + print "#\n# $name\n#\n"; + print "DEF $name CON 0 40 Y N 1 F N\n"; + $h = $x/2*100; + print "F0 \"CON\" 0 ".($h+50)." 60 H V C CNN\n"; + print "F1 \"$name\" 0 ".(-$h-50)." 60 H V C CNN\n"; + print "DRAW\n"; + print "S -100 -$h 100 $h 0 1 0 N\n"; + $n = 1; + for ($px = 1; $px <= $x; $px++) { + for ($py = 1; $py <= $y; $py++) { + print "X $n $n ".(400*($py-1.5)*2)." ". + ($h-$px*100+50)." 300 ". + ("?", "R", "L")[$py]." 50 50 1 1 P\n"; + $n++; + } + } + print "ENDDRAW\n"; + print "ENDDEF\n"; + } +} +print "#\n#End Library\n"; From 20c94362beec5278c00ccc1b0f54c8e53178f012 Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Sun, 10 Jun 2012 11:31:08 -0300 Subject: [PATCH 4/6] modules/pads-array.fpd: we need loop for pins and for packages, not just one --- modules/pads-array.fpd | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/modules/pads-array.fpd b/modules/pads-array.fpd index f50b1ab..a44e518 100644 --- a/modules/pads-array.fpd +++ b/modules/pads-array.fpd @@ -17,12 +17,14 @@ table { "120x60", 120mil, 60mil } table - { ?name, e, N } + { ?name, e, Nmax } { "2mm", 50mil, 20 } { "60x60", 0mm, 1 } { "80x80", 0mm, 1 } { "120x60", 0mm, 1 } +loop N = 2, Nmax + loop n = 1, N __0: vec @(0mm, e*(n-1)) From 96c7eb392cf43e09e431682d23c8613716f4b001 Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Sun, 10 Jun 2012 11:32:13 -0300 Subject: [PATCH 5/6] components/adxl32x.lib: Analog Devices ADXL321, ... accelerometers http://www.analog.com/static/imported-files/data_sheets/ADXL321.pdf --- AUTHORS | 1 + components/EXPAND | 3 +++ components/adxl32x.lib | 30 ++++++++++++++++++++++++++++++ 3 files changed, 34 insertions(+) create mode 100644 components/adxl32x.lib diff --git a/AUTHORS b/AUTHORS index 61b3b77..4b146f2 100644 --- a/AUTHORS +++ b/AUTHORS @@ -42,6 +42,7 @@ Werner Almesberger components/74x1g07_5.lib components/74x1g07_4.lib components/74x1g07_6.lib + components/adxl32x.lib components/atmega8u2.lib components/c8051f320.lib components/c8051f326.lib diff --git a/components/EXPAND b/components/EXPAND index fbd3572..84fb659 100644 --- a/components/EXPAND +++ b/components/EXPAND @@ -139,6 +139,9 @@ Electromechanical SW_PUSH Case MH +Sensor + Acceleration + ADXL32X FPGA Xilinx xc6slx45-2fgg484c diff --git a/components/adxl32x.lib b/components/adxl32x.lib new file mode 100644 index 0000000..3ebf7a0 --- /dev/null +++ b/components/adxl32x.lib @@ -0,0 +1,30 @@ +EESchema-LIBRARY Version 2.3 Date: Sun Jun 10 11:27:51 2012 +#encoding utf-8 +# +# ADXL32X +# +DEF ADXL32X U 0 40 Y Y 1 F N +F0 "U" -400 500 60 H V C CNN +F1 "ADXL32X" 0 0 60 H V C CNN +DRAW +X Vs 14 50 750 300 D 50 50 1 0 W +X Vs 15 -50 750 300 D 50 50 1 0 W +X NC 16 -150 750 300 D 50 50 1 0 N +S 450 -450 -450 450 0 1 0 N +X NC 1 -750 150 300 R 50 50 1 1 N +X ST 2 -750 50 300 R 50 50 1 1 I +X COM 3 -750 -50 300 R 50 50 1 1 W +X NC 4 -750 -150 300 R 50 50 1 1 N +X COM 5 -150 -750 300 U 50 50 1 1 W +X COM 6 -50 -750 300 U 50 50 1 1 W +X COM 7 50 -750 300 U 50 50 1 1 W +X NC 8 150 -750 300 U 50 50 1 1 N +X NC 9 750 -150 300 L 50 50 1 1 N +X Yout 10 750 -50 300 L 50 50 1 1 O +X NC 11 750 50 300 L 50 50 1 1 N +X Xout 12 750 150 300 L 50 50 1 1 O +X NC 13 150 750 300 D 50 50 1 1 N +ENDDRAW +ENDDEF +# +#End Library From e01b8d64f9a8eb4596b10a0a6aa35c8177e6f1d6 Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Sun, 10 Jun 2012 11:56:26 -0300 Subject: [PATCH 6/6] modules/qfn.fpd: add experimental footprint for AD CP-16-5a* MQ_LFCSP_LQ This package is more BGA than QFN, but let's see how this goes. Since AD provide footprints for this package only in the proprietary BXL format, all the parameters are best guesses. --- modules/qfn.fpd | 1 + 1 file changed, 1 insertion(+) diff --git a/modules/qfn.fpd b/modules/qfn.fpd index 39a0b66..e0b6eee 100644 --- a/modules/qfn.fpd +++ b/modules/qfn.fpd @@ -103,6 +103,7 @@ unit auto table { pins, variant, X1, Y1, X2, Y2, E, C1, C2, SE, SNX, SNY, SX, SY } + { 16, "LFCSP_LQ", 0.35mm, 1.2mm, 2.43mm, 2.43mm, 0.65mm, 4.1mm, 4.1mm, 1mm, 2, 2, 0.7mm, 0.7mm } { 28, "Atmel", 0.24mm, 0.7mm, 2.4mm, 2.4mm, 0.45mm, 4.1mm, 4.1mm, 1mm, 2, 2, 0.8mm, 0.8mm } { 28, "MCHP-ML", 0.37mm, 1mm, 4.25mm, 4.25mm, 0.65mm, 5.7mm, 5.7mm, 1mm, 3, 3, 0.65mm, 0.65mm } { 28, "SiLabs", 0.25mm, 0.9mm, 3.3mm, 3.3mm, 0.5mm, 4.8mm, 4.8mm, 1.1mm, 3, 3, 0.9mm, 0.9mm }