#
# Tags:
#
# F     Footprint name (must be first)
# N     Data sheet identifier (N tag of BOOKSHELF; can be omitted if equal to F)
#

# Printed 8:10 card contacs
F: 8_10-card

# BGA
F: bga
# - 484-Pin FineLine BGA(FBGA), from Altera
#   http://www.altera.com/devicepackaging/04R00416-02.pdf
#
# - FG(G)484 Fine-Pitch BGA, from Xilinx
#   http://www.xilinx.com/support/documentation/user_guides/ug385.pdf
#

# EUS (R-PDSS-T6)
F: eus
#
# - for example: the PTH04000WAH data sheet, it's EUS
#   http://www.ti.com/lit/ds/symlink/pth04000w.pdf
# 

# Fiducial (1 mm copper pad, 2 mm solder mask clearance)
F: fiducial

# IR Receiver Module
F: ir
#
# From Vishay:
#
# - the TSOP322.., TSOP324.., TSOP348.., TSOP344.. data sheet
#   http://www.vishay.com/docs/81732/tsop348.pdf

# MDIP
F: mdip
#
# From FAIRCHILD:
#
# - the 6N138S data sheet
#   http://www.fairchildsemi.com/ds/6N/6N138.pdf
#
# Package Type:
#
# - MDIP 8L
#   http://www.fairchildsemi.com/package/packageDetails.html?id=PN_192-B08
#
# Package Drawing:
#
#   http://www.fairchildsemi.com/dwg/N0/N08H.pdf

# Mini-USB B receptable (SMT; almost generic)
F: mini_usb_b

# Solder pads and test points
F: pads

# "Generic" simple QFN
F: qfn
#
# The information for these packages comes from various sources:
#
# - the C8051F326 data sheet, for the QFN28 footprint (N: mcu)
# - the AT86F326 data sheet, for the QFN32 package dimensions (N: txrx)
# - Atmel's general recommendations for QFN land patterns (N: atmel-qfn)
# - NXP's SOT617-1 and SOT617-3, for package and land pattern:
#   http://www.nxp.com/package/SOT617-1.html
#   http://www.nxp.com/package/SOT617-3.html
#
# Solder paste:
#
# Footprint    Center pad  Closest NXP (with complete land pattern)
# QFN28-Atmel  2.4 mm	   for further study
# QFN28-SiLabs 3.3 mm	   use SiLab's specification
# QFN32-VHHD-2 3.7 mm	   between SOT818-1 and SOT788-1
# QFN32-VHHD-6 3.4 mm	   SOT818-1
#
# From NXP:
#
# Package   Pad  Paste zone  Islands  Isl. size  Isl. gap
# SiLabs    3.25 3.1	     3 x 3    0.9	 
# SOT818-1  3.4  1.75	     2 x 2    0.75	 0.25
# SOT788-1  4.0  2.4	     3 x 3    0.6	 0.3
#
# NXP rules (AN10365):
# - paste zone = 35% of pad area
# - paste coverge = 20% of pad area
#
# Our parameters:
#
# Package       Pad  Paste zone  Islands  Isl. size  Isl. gap  Zone  Coverage
# QFN32-VHHD-2  3.7  2.15	 3 x 3	  0.55	     0.25      34%   20%
# QFN32-VHHD-6  3.4  1.95	 2 x 2	  0.75	     0.45      33%   19%
#
# Known bugs:
#
# - really ought to merge all the various QFN definitions (we have more
#   over at gta02-core) into a single QFN file with a big mean table of
#   everything
#
N: sot617-3-lp

# "Generic" simple QFP (for now, just for Silabs' C8051F320)
F: qfp
#
# - the C8051F320 data sheet
#   http://www.silabs.com/Support%20Documents/TechnicalDocs/C8051F32x.pdf
# 
# according to MAXIM web: http://www.maxim-ic.com/design/packaging/
# the LQPF48/TQFP48 referred to the same package drawing and land pattern
#
# - LQFP48, TQFP48: C48 -> package drawing
#   http://pdfserv.maxim-ic.com/package_dwgs/21-0054.PDF
#	
# - LQFP48, TQFP48: C48 -> package land pattern
#   http://pdfserv.maxim-ic.com/land_patterns/90-0093.PDF
#  
# - LQFP64, JEDEC MS-026-BCD for example: the ADV7181CBSTZ data sheet, package drawing
#   http://www.analog.com/static/imported-files/data_sheets/ADV7181C.pdf 
#	
# - LQFP64, C64 -> package drawing
#   http://pdfserv.maxim-ic.com/package_dwgs/21-0083.PDF
#	
# - LQFP64, C64 -> package land pattern
#   http://pdfserv.maxim-ic.com/land_patterns/90-0141.PDF
#  

# SOIC
F: soic
#
# From TI:
#
# - the SN75HVD12DR data sheet
#   http://www.ti.com/lit/ds/symlink/sn75hvd12.pdf
#
# Package Drawing:
#
# - D(JEDEC)
#   - R-PDSO-G8
#   http://www-s.ti.com/sc/psheets/msoi002j/msoi002j.pdf
#   - R-PDSO-G14
#   http://www-s.ti.com/sc/psheets/mpds177g/mpds177g.pdf
#   - R-PDSO-G16
#   http://www-s.ti.com/sc/psheets/mpds178g/mpds178g.pdf

F: sot

# SOT23 generic package with counter-clockweise or clockwise pin assignment
F: sot23
#
# - SOT23: for example, the APX803-40SAG-7 data sheet, package drawing and land pattern
#   http://www.diodes.com/datasheets/APX803.pdf
#	

# Standard rectangular passive components
F: stdpass

# SOT-323 package with counter-clockweise or clockwise pin assignment
F: sot-323
N: mmst3904

# http://www.nxp.com/#/page/content=[f=/packages/SOT341-1.xml]
# http://www.nxp.com/packages/SOT341-1.html
# http://www.nxp.com/documents/reflow_soldering/SSOP-TSSOP-VSO-REFLOW.pdf

# experimental generic SOT footprint; currently only for
#
# - SOT-323 aka SC-70
#   http://www.onsemi.com/pub_link/Collateral/BAV99WT1-D.PDF
# - SOT-363 aka SC-88 aka SC-70-6
#   http://www.onsemi.com/pub_link/Collateral/MBT3946DW1T1-D.PDF
# - SOT-523
#   http://www.diodes.com/datasheets/ds31784.pdf
# - SOT-563
#   http://www.onsemi.com/pub_link/Collateral/NTZD3155C-D.PDF
#
# some conflicts with the outline exist

# "Generic" simple SSOP
F: ssop
#
# - TSSOP14: for example: the MIC2550AYTS data sheet, package drawing
#   http://www.micrel.com/_PDF/mic2550a.pdf
#	
# - TSSOP14: from NXP -> package land pattern
#   http://www.nxp.com/packages/SOT402-1.html
#   http://www.nxp.com/documents/reflow_soldering/sot402-1_fr.pdf
 

# "Generic" simple TSOP
F: tsop
#
# - the JS28F256J3F105 data sheet, it's TSOP-56
#   http://www.micron.com/parts/nor-flash/parallel-nor-flash/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/6062319942_J3_65_256M_MLC_DS.ashx
# 
# according to MAXIM web: http://www.maxim-ic.com/design/packaging/
# the TSOP32 referred to the same package drawing and land pattern
#
# - TSOP28: Z28 -> package drawing
#   http://pdfserv.maxim-ic.com/package_dwgs/21-0273.PDF
#	
# - TSOP28: Z28 -> package land pattern
#   http://pdfserv.maxim-ic.com/land_patterns/90-0319.PDF
#  
#
# - TSOP32: Z32 -> package drawing
#   http://pdfserv.maxim-ic.com/package_dwgs/21-0274.PDF
#	
# - TSOP32: Z32 -> package land pattern
#   http://pdfserv.maxim-ic.com/land_patterns/90-0320.PDF
#  
#
# - TSOP66: for example: the MT46V32M16P-5B:F data sheet, it's 400 mil, package drawing
#   http://download.micron.com/pdf/datasheets/dram/ddr/512MBDDRx4x8x16.pdf 
#	
# - TSOP66: currently referred to M1rc3 design files land pattern:
#   width of pad  -> 0.4 mm, it's rectangle not round one
#   length of pad -> 1.25 mm
#   Width of body -> 400 mil

# "Generic" simple TO-252, TO-263
F: to
#
# - TO-252 for example: the LP38690DT-3.3 data sheet, it's TO-252
#   http://www.ti.com/lit/ds/symlink/lp38690.pdf
# 
# - JEDEC Spec: TO-252 AA  -> package drawing and land pattern
#   http://www.national.com/packaging/mkt/td03b.pdf
#	
# - TO-263 for example: the LP38511TJ-ADJ/NOPB data sheet, it's TO-263
#   http://www.ti.com/lit/ds/symlink/lp38511-adj.pdf
# 
# - JEDEC Spec: TO-263 THIN  -> package drawing and land pattern
#   http://www.national.com/packaging/mkt/tj5a.pdf
#	

# USB A plug for SMT
#
# Note: the signal pads are enlarged by 0.2 mm and their center is shifted by
# 0.1 mm with respect to the reference.
#
# According to the data sheet, the leads terminate at (2.00+/-0.10 mm)/2+
# 2.48 mm = 3.48+/-0.10 mm from the center. The reference footprint puts the
# edge of the pads at (2.00+/-0.10 mm)/2+2.6 mm = 3.6 mm+/-0.10 mm, so the
# maximum lead end could be at 3.58 mm while the minimum pad edge could be at
# 3.5 mm.
#
# Assuming that the pad is intended to extend a bit beyond the lead, we need
# to add 0.2 mm to compensate for these tolerances. (The pad tolerance may not
# be intended to be used this way, however, we still have to consider small
# errors in registration, which also amount to about 0.1 mm, so the calculation
# remains valid.)
#
F: usb_a_plug_smt

# USB 2.0 from usb_20_040908, page 99
F: usb-a-pcb