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mirror of git://projects.qi-hardware.com/m1.git synced 2024-06-28 00:29:29 +03:00
m1/jtag-serial/usb_jtag.pro
2011-01-01 15:46:01 +00:00

82 lines
1.1 KiB
INI

update=Sun 19 Dec 2010 13:14:46 CST
version=1
last_client=pcbnew
[cvpcb]
version=1
NetITyp=0
NetIExt=.net
PkgIExt=.pkg
NetDir=
LibDir=
NetType=0
[cvpcb/libraries]
EquName1=devcms
[general]
version=1
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
SimCmd=
UseNetN=0
LabSize=60
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=1
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=conn
LibName4=./components/ft2232h
LibName5=./components/mic5207-3
LibName6=./components/crystal_smd
LibName7=./components/nup2201
LibName8=./components/sn74lvc1g17
LibName9=./components/93c46
[pcbnew]
version=1
PadDrlX=354
PadDimH=591
PadDimV=591
BoardThickness=630
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=30
LastNetListRead=usb_jtag.net
[pcbnew/libraries]
LibDir=
LibName1=./modules/jtag-uart