nn-usb-fpga/Examples/blink/logic/blink.v

`timescale 1ns / 1ps
module blink(clk, reset, led);
  input            clk, reset;
  output           led;

  reg [24:0]  counter;
  always @(posedge clk) begin
    if (~reset)
      counter <= {25{1'b0}};
    else
      counter <= counter + 1;
  end 
  assign led = counter[24];

endmodule
Adding blink example 2010-04-02 20:51:59 -05:00			`timescale 1ns / 1ps
			`module blink(clk, reset, led);`
			`input clk, reset;`
			`output led;`

			`reg [24:0] counter;`
			`always @(posedge clk) begin`
Updating examples to Board changes, adding irq driver demo 2010-06-11 08:06:13 -05:00			`if (~reset)`
Adding blink example 2010-04-02 20:51:59 -05:00			`counter <= {25{1'b0}};`
			`else`
			`counter <= counter + 1;`
			`end`
			`assign led = counter[24];`

			`endmodule`