mirror of
git://projects.qi-hardware.com/nn-usb-fpga.git
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70 lines
2.3 KiB
C
70 lines
2.3 KiB
C
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/*
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* JZ47xx GPIO lines
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*
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* Written 2010 by Andres Calderon andres.calderon@emqbit.com
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*/
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#ifndef __jz47xx_gpio_h__
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#define __jz47xx_gpio_h__
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#define JZ_GPIO_PORT_A 0
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#define JZ_GPIO_PORT_B 1
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#define JZ_GPIO_PORT_C 2
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#define JZ_GPIO_PORT_D 3
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typedef volatile unsigned int JZ_REG; /* Hardware register definition */
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typedef struct _JZ_PIO
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{
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JZ_REG PXPIN; /* PIN Level Register */
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JZ_REG Reserved0;
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JZ_REG Reserved1;
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JZ_REG Reserved2;
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JZ_REG PXDAT; /* Port Data Register */
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JZ_REG PXDATS; /* Port Data Set Register */
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JZ_REG PXDATC; /* Port Data Clear Register */
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JZ_REG Reserved3;
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JZ_REG PXIM; /* Interrupt Mask Register */
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JZ_REG PXIMS; /* Interrupt Mask Set Reg */
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JZ_REG PXIMC; /* Interrupt Mask Clear Reg */
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JZ_REG Reserved4;
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JZ_REG PXPE; /* Pull Enable Register */
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JZ_REG PXPES; /* Pull Enable Set Reg. */
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JZ_REG PXPEC; /* Pull Enable Clear Reg. */
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JZ_REG Reserved5;
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JZ_REG PXFUN; /* Function Register */
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JZ_REG PXFUNS; /* Function Set Register */
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JZ_REG PXFUNC; /* Function Clear Register */
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JZ_REG Reserved6;
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JZ_REG PXSEL; /* Select Register */
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JZ_REG PXSELS; /* Select Set Register */
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JZ_REG PXSELC; /* Select Clear Register */
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JZ_REG Reserved7;
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JZ_REG PXDIR; /* Direction Register */
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JZ_REG PXDIRS; /* Direction Set Register */
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JZ_REG PXDIRC; /* Direction Clear Register */
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JZ_REG Reserved8;
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JZ_REG PXTRG; /* Trigger Register */
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JZ_REG PXTRGS; /* Trigger Set Register */
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JZ_REG PXTRGC; /* Trigger Set Register */
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JZ_REG Reserved9;
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JZ_REG PXFLG; /* Port Flag Register */
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JZ_REG PXFLGC; /* Port Flag clear Register */
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} JZ_PIO, *PJZ_PIO;
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void jz_gpio_as_output (int port, unsigned int o);
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void jz_gpio_as_input (int port, unsigned int o);
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void jz_gpio_set_pin (int port, unsigned int o);
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void jz_gpio_clear_pin (int port, unsigned int o);
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void jz_gpio_out (int port, unsigned int o, unsigned int val);
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unsigned int jz_gpio_get_pin (int port, unsigned int o);
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JZ_PIO * jz_gpio_map ();
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#endif
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