mirror of
git://projects.qi-hardware.com/nn-usb-fpga.git
synced 2024-12-13 12:42:49 +02:00
123 lines
3.9 KiB
Plaintext
123 lines
3.9 KiB
Plaintext
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(ExpressProject "ECB_JZ7425"
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(ProjectVersion "19981106")
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(ProjectType "PCB")
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(Folder "Design Resources"
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(Folder "Library"
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(File ".\xburst.olb"
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(Type "Schematic Library")))
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(NoModify)
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(File ".\ecb_jz7425.dsn"
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(Type "Schematic Design"))
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(BuildFileAddedOrDeleted "x")
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(CompileFileAddedOrDeleted "x")
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(GATE_&_PIN_SWAP_Scope "0")
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(GATE_&_PIN_SWAP_File_Name "C:\CAINPCB\ECB_JZ7425\ECB_JZ7425.SWP")
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(Backannotation_TAB "1")
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(ANNOTATE_Scope "0")
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(ANNOTATE_Mode "1")
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(ANNOTATE_Action "1")
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(Annotate_Page_Order "0")
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(ANNOTATE_Reset_References_to_1 "FALSE")
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(ANNOTATE_No_Page_Number_Change "FALSE")
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(ANNOTATE_Property_Combine "{Value}{Source Package}{POWER_GROUP}")
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(ANNOTATE_IncludeNonPrimitive "FALSE")
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(Netlist_TAB "3")
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(LAYOUT_Netlist_File "ECB_JZ7425.MNL")
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(LAYOUT_PCB_Footprint "{PCB Footprint}")
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(FALSE)
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(LAYOUT_Units "0")
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(Board_sim_option "VHDL_flow")
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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(TRUE)
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( "TRUE"))
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(Folder "Outputs"
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(File ".\ecb_jz7425.mnl"
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(Type "LAYOUT Netlist File")))
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(Folder "Referenced Projects")
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(PartMRUSelector
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(OFFPAGELEFT-L
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(LibraryName "C:\ORCAD\ORCAD_16.0\TOOLS\CAPTURE\LIBRARY\CAPSYM.OLB")
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(DeviceIndex "0"))
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("HEADER 20X2"
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(FullPartName "HEADER 20X2.Normal")
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(LibraryName "C:\ORCAD\ORCAD_16.0\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
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(DeviceIndex "0"))
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(mic811
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(FullPartName "mic811.Normal")
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(LibraryName "C:\CAINPCB\ECB_JZ7425\XBURST.OLB")
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(DeviceIndex "0"))
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("HEADER 2"
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(FullPartName "HEADER 2.Normal")
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(LibraryName "C:\CADENCE\SPB_15.5\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
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(DeviceIndex "0"))
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(TLV1548
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(FullPartName "TLV1548.Normal")
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(LibraryName "C:\CAINPCB\ECB_JZ7425\XBURST.OLB")
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(DeviceIndex "0"))
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(PCA9701PW
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(FullPartName "PCA9701PW.Normal")
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(LibraryName "C:\CAINPCB\ECB_JZ7425\XBURST.OLB")
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(DeviceIndex "0"))
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(RESAR_IS_4/SM
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(FullPartName "RESAR_IS_4/SM.Normal")
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(LibraryName "C:\ORCAD\ORCAD_16.0\TOOLS\CAPTURE\LIBRARY\DISCRETE.OLB")
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(DeviceIndex "0"))
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("HEADER 4X2"
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(FullPartName "HEADER 4X2.Normal")
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(LibraryName "C:\ORCAD\ORCAD_16.0\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
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(DeviceIndex "0"))
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("HEADER 1"
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(FullPartName "HEADER 1.Normal")
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(LibraryName "C:\CADENCE\SPB_15.5\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
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(DeviceIndex "0"))
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("HEADER 5"
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(FullPartName "HEADER 5.Normal")
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(LibraryName "C:\CADENCE\SPB_15.5\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
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(DeviceIndex "0"))
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(XC6204B302MRN
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(FullPartName "XC6204B302MRN.Normal")
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(LibraryName
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"C:\DOCUMENTS AND SETTINGS\CAIN\ESCRITORIO\SEED_BOARD\XBURST.OLB")
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(DeviceIndex "0"))
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(KB3361
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(FullPartName "KB3361.Normal")
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(LibraryName
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"C:\DOCUMENTS AND SETTINGS\CAIN\ESCRITORIO\SEED_BOARD\XBURST.OLB")
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(DeviceIndex "0"))
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(XC6206P302M
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(FullPartName "XC6206P302M.Normal")
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(LibraryName
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"C:\DOCUMENTS AND SETTINGS\CAIN\ESCRITORIO\SEED_BOARD\XBURST.OLB")
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(DeviceIndex "0"))
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(JZ4725
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(FullPartName "JZ4725.Normal")
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(LibraryName "C:\CAINPCB\ECB_JZ7425\XBURST.OLB")
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(DeviceIndex "0")))
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(LastUsedLibraryBrowseDirectory "C:\OrCAD\OrCAD_16.0\tools\capture\library")
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(GlobalState
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(FileView
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(Path "Design Resources")
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(Path "Design Resources" "C:\cainPCB\ECB_JZ7425\ecb_jz7425.dsn")
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(Path "Design Resources" "C:\cainPCB\ECB_JZ7425\ecb_jz7425.dsn"
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"SCHEMATIC1")
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(Path "Design Resources" "Library"))
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(HierarchyView)
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(Doc
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(Type "COrCapturePMDoc")
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(Frame
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(Placement "44 0 1 -1 -1 -4 -23 10 465 17 427"))
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(Tab 0))))
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