Fixing plasma files.. Now works :)

plasma/logic/Makefile

@@ -1,14 +1,14 @@
 DESIGN          = plasma
 PINS           = $(DESIGN).ucf
 DEVICE          = xc3s500e-VQ100-4
-#DEVICE          = xc3s250e-fg320-4
+#DEVICE          = xc3s500e-fg320-4
 BGFLAGS         = -g TdoPin:PULLNONE -g DonePin:PULLUP \
                   -g CRC:enable -g StartUpClk:CCLK
 SIM_CMD = /opt/cad/modeltech/bin/vsim 
 SIM_COMP_SCRIPT = simulation/$(DESIGN)_TB.do
 SIMGEN_OPTIONS = -p $(FPGA_ARCH) -lang $(LANGUAGE)
 
-SRC_HDL             = plasma.vhd ram_image.vhd alu.vhd control.vhd mem_ctrl.vhd mult.vhd shifter.vhd bus_mux.vhd  mlite_cpu.vhd pc_next.vhd mlite_pack.vhd pipeline.vhd reg_bank.vhd uart.vhd 
+SRC_HDL             = mlite_pack.vhd plasma.vhd ram_image.vhd alu.vhd control.vhd mem_ctrl.vhd mult.vhd shifter.vhd bus_mux.vhd  mlite_cpu.vhd pc_next.vhd pipeline.vhd reg_bank.vhd uart.vhd 
  
 all:            bits