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git://projects.qi-hardware.com/nn-usb-fpga.git
synced 2025-04-21 12:27:27 +03:00
Adding RXDF TXDF connect them to MAX232, allowing communication between CPU and FPGA via serial port
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@@ -61,30 +61,30 @@ G04 Aperture Definitions ***
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%ADD60C,0.0073*%
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%ADD59C,0.0315*%
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%ADD60C,0.0394*%
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%ADD61C,0.0236*%
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%ADD62C,0.0276*%
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%ADD63C,0.0216*%
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%ADD64C,0.0197*%
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%ADD65C,0.0394*%
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%ADD66C,0.0071*%
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%ADD67C,0.0315*%
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%ADD68C,0.0118*%
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%ADD69C,0.0157*%
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%ADD70C,0.0550*%
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%ADD71R,0.0550X0.0550*%
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%ADD72C,0.3150X0.1575*%
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%ADD73C,0.0620*%
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%ADD74R,0.0620X0.0620*%
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%ADD75C,0.0472*%
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%ADD76C,0.1340*%
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%ADD77C,0.0531*%
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%ADD78C,0.0775*%
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%ADD79C,0.0669*%
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%ADD80C,0.0236*%
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%ADD81C,0.0039*%
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%ADD82C,0.0236*%
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%ADD63C,0.0118*%
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%ADD64C,0.0071*%
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%ADD66C,0.0236*%
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%ADD67C,0.0157*%
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%ADD68C,0.0216*%
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%ADD69C,0.0197*%
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%ADD70C,0.0094*%
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%ADD71C,0.0550*%
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%ADD72R,0.0550X0.0550*%
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%ADD73C,0.3150X0.1575*%
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%ADD74C,0.0620*%
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%ADD75R,0.0620X0.0620*%
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%ADD76C,0.0472*%
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%ADD77C,0.1340*%
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%ADD79C,0.0775*%
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%ADD80C,0.0669*%
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%ADD81C,0.0236*%
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%ADD84R,0.1811X0.0827*%
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%ADD85R,0.0453X0.0378*%
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@@ -131,20 +131,20 @@ G04 Aperture Definitions ***
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*
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G04 Plot Data ***
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*
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G54D70*
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G54D71*
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X0024397Y0084498D03*
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X0023401Y0084521D03*
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X0022401D03*
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X0024416Y0083537D03*
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X0023416D03*
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X0022416D03*
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G54D71*
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G54D72*
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X0025401Y0084521D03*
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X0025416Y0083537D03*
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G54D73*
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G54D74*
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X0026551Y0083474D03*
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X0008457Y0075802D03*
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G54D74*
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G54D75*
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X0026551Y0084474D03*
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X0007457Y0075802D03*
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G54D98*
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