Adding RXDF TXDF connect them to MAX232, allowing communication between CPU and FPGA via serial port

design_files/ECB_JZ7425.opj

@@ -48,6 +48,7 @@
     (TRUE)
     (TRUE)
     (FALSE)
+    (TRUE)
     ( "TRUE"))
   (Folder "Outputs"
     (File ".\ecb_jz7425.mnl"
@@ -126,34 +127,4 @@
       (Type "COrCapturePMDoc")
       (Frame
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-      (Tab 0))
-    (Doc
-      (Type "COrSchematicDoc")
-      (Frame
-        (Placement "44 0 1 -1 -1 -1 -1 44 976 44 413")
-        (Scroll "139 330")
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-        (Occurrence "/"))
-      (Path "C:\CAINPCB\ECB_JZ7425\ECB_JZ7425.DSN")
-      (Schematic "SCHEMATIC1")
-      (Page "1-CPU"))
-    (Doc
-      (Type "COrSchematicDoc")
-      (Frame
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-      (Path "C:\CAINPCB\ECB_JZ7425\ECB_JZ7425.DSN")
-      (Schematic "SCHEMATIC1")
-      (Page "8-FPGA"))
-    (Doc
-      (Type "COrSchematicDoc")
-      (Frame
-        (Placement "44 0 1 -1 -1 -1 -1 88 828 88 471")
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-      (Path "C:\CAINPCB\ECB_JZ7425\ECB_JZ7425.DSN")
-      (Schematic "SCHEMATIC1")
-      (Page "6-POWER"))))
+      (Tab 0))))