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Adding lm32 demo to SAKC project
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Carlos Camargo
252
lm32/logic/sakc/rtl/wb_conbus/wb_conbus_arb.v
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252
lm32/logic/sakc/rtl/wb_conbus/wb_conbus_arb.v
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// General Round Robin Arbiter ////
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//// ////
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//// ////
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//// Author: Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org/cores/wb_conmax/ ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2000-2002 Rudolf Usselmann ////
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//// www.asics.ws ////
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//// rudi@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//
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// copy from wb_conmax
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//
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//
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//
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//
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//
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`include "wb_conbus_defines.v"
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module wb_conbus_arb(clk, rst, req, gnt);
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input clk;
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input rst;
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input [7:0] req; // Req input
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output [2:0] gnt; // Grant output
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//input next; // Next Target
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///////////////////////////////////////////////////////////////////////
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//
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// Parameters
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//
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parameter [2:0]
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grant0 = 3'h0,
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grant1 = 3'h1,
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grant2 = 3'h2,
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grant3 = 3'h3,
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grant4 = 3'h4,
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grant5 = 3'h5,
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grant6 = 3'h6,
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grant7 = 3'h7;
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///////////////////////////////////////////////////////////////////////
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//
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// Local Registers and Wires
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//
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reg [2:0] state, next_state;
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///////////////////////////////////////////////////////////////////////
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//
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// Misc Logic
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//
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assign gnt = state;
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always@(posedge clk or posedge rst)
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if(rst) state <= grant0;
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else state <= next_state;
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///////////////////////////////////////////////////////////////////////
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//
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// Next State Logic
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// - implements round robin arbitration algorithm
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// - switches grant if current req is dropped or next is asserted
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// - parks at last grant
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//
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always@(state or req )
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begin
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next_state = state; // Default Keep State
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case(state) // synopsys parallel_case full_case
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grant0:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[0] )
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begin
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if(req[1]) next_state = grant1;
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else
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if(req[2]) next_state = grant2;
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else
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if(req[3]) next_state = grant3;
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else
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if(req[4]) next_state = grant4;
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else
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if(req[5]) next_state = grant5;
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else
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if(req[6]) next_state = grant6;
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else
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if(req[7]) next_state = grant7;
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end
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grant1:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[1] )
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begin
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if(req[2]) next_state = grant2;
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else
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if(req[3]) next_state = grant3;
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else
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if(req[4]) next_state = grant4;
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else
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if(req[5]) next_state = grant5;
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else
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if(req[6]) next_state = grant6;
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else
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if(req[7]) next_state = grant7;
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else
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if(req[0]) next_state = grant0;
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end
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grant2:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[2] )
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begin
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if(req[3]) next_state = grant3;
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else
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if(req[4]) next_state = grant4;
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else
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if(req[5]) next_state = grant5;
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else
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if(req[6]) next_state = grant6;
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else
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if(req[7]) next_state = grant7;
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else
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if(req[0]) next_state = grant0;
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else
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if(req[1]) next_state = grant1;
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end
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grant3:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[3] )
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begin
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if(req[4]) next_state = grant4;
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else
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if(req[5]) next_state = grant5;
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else
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if(req[6]) next_state = grant6;
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else
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if(req[7]) next_state = grant7;
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else
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if(req[0]) next_state = grant0;
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else
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if(req[1]) next_state = grant1;
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else
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if(req[2]) next_state = grant2;
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end
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grant4:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[4] )
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begin
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if(req[5]) next_state = grant5;
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else
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if(req[6]) next_state = grant6;
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else
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if(req[7]) next_state = grant7;
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else
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if(req[0]) next_state = grant0;
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else
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if(req[1]) next_state = grant1;
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else
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if(req[2]) next_state = grant2;
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else
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if(req[3]) next_state = grant3;
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end
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grant5:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[5] )
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begin
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if(req[6]) next_state = grant6;
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else
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if(req[7]) next_state = grant7;
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else
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if(req[0]) next_state = grant0;
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else
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if(req[1]) next_state = grant1;
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else
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if(req[2]) next_state = grant2;
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else
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if(req[3]) next_state = grant3;
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else
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if(req[4]) next_state = grant4;
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end
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grant6:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[6] )
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begin
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if(req[7]) next_state = grant7;
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else
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if(req[0]) next_state = grant0;
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else
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if(req[1]) next_state = grant1;
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else
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if(req[2]) next_state = grant2;
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else
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if(req[3]) next_state = grant3;
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else
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if(req[4]) next_state = grant4;
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else
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if(req[5]) next_state = grant5;
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end
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grant7:
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// if this req is dropped or next is asserted, check for other req's
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if(!req[7] )
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begin
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if(req[0]) next_state = grant0;
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else
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if(req[1]) next_state = grant1;
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else
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if(req[2]) next_state = grant2;
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else
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if(req[3]) next_state = grant3;
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else
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if(req[4]) next_state = grant4;
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else
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if(req[5]) next_state = grant5;
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else
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if(req[6]) next_state = grant6;
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end
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endcase
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end
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endmodule
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