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mirror of git://projects.qi-hardware.com/nn-usb-fpga.git synced 2025-04-21 12:27:27 +03:00

Adding PS2, capacitive keyboard examples

This commit is contained in:
carlos
2010-11-30 19:26:56 -05:00
parent 2efe106cf3
commit 62d0edf217
275 changed files with 1696660 additions and 23991 deletions

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CommandLine-Map
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CommandLine-Ngdbuild
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CommandLine-Par
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CommandLine-Xst
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Previous-NGD
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Previous-NGM
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Previous-Packed-NCD
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Previous-Routed-NCD
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CommandLine
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/bitgen project_r.ncd -l -w -g TdoPin:PULLNONE -g DonePin:PULLUP -g CRC:enable -g StartUpClk:CCLK
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FormatString
bitgen [-d] [-j] [-b] [-w] [-l] [-m] [-t] [-n] [-u] [-a] [--p] [-r <bitFile>] [-intstyle ise|xflow|silent] [-ise <projectrepositoryfile>] {-bd <BRAM_data_file> [tag <tagname>]} {-g <setting_value>} <infile[.ncd]> [<outfile>] [<pcffile[.pcf]>]
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CommandLine
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/map -pr b -p xc3s500e-VQ100-4 project
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FormatString
map <infile[.ngd]> [-bp] [-c [<packfactor:0,100>]] [-cm <covermode>] [-detail] [-equivalent_register_removal on|off] [-global_opt off|&speed|&area|on] [-ignore_keep_hierarchy] [-intstyle ise|xflow|silent] [-ir] [-ise <iseProjectFile>] [-k 4|5|6|7|8] [-l] [-lc off|area|auto] [-logic_opt off|on] [-ntd] [-o <outfile[.ncd]>] [-ol std|med|high] [-p <partname>] [-power off|on] [-activityfile <activityfile[.vcd|.saif]>] [-pr off|i|o|b] [-r] [-register_duplication [off|on]] [-retiming off|on] [-smartguide <guide[.ncd]>] [-t <costtable:1,100>] [-timing] [-tx on|off|aggressive|limit] [-u] [-w] [-x] [-xe c|n] [--ds <doodlescript>] [--hv] [--lambda <inputlambda:1,15> <outputlambda:1,4>] [--m] [--ms <mapscript>] [--physical_synthesis off|on] [--smartsynthesis <value>] [--ts_comb <combll> <combul>] [--ts_cy <cyll> <cyul>] [--ts_load <load>] [--ts_trigger <trigger>] [--use_soft_locs] [--global_opt_script <file>] [<prffile[.pcf]>]
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CommandLine
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/ngdbuild -p xc3s500e-VQ100-4 project.ngc -uc ../uart_peripheral.ucf
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FormatString
ngdbuild [-p <partname>] {-sd <source_dir>} {-l <library>} [-ur <rules_file[.urf]>] [-dd <output_dir>] [-r] [-a] [-u] [-nt timestamp|on|off] [-uc <ucf_file[.ucf]>] [-aul] [-bm <bmm_file[.bmm]>] [-i] [-modular initial|module|assemble] [-intstyle ise|xflow|silent] [-quiet] [-verbose] [-active <active_module_name>] [-pimpath <pimpath>] {-use_pim <pim_module_name>} [-insert_keep_hierarchy] [--forcengd] {--n <ngl_file>} {--sl <library>} [--global_opt] [--script <tcl_file>] [--incremental] [--csttrans] <design_name> [<ngd_file[.ngd]>]
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CommandLine
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/par -w project project_r.ncd
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FormatString
par [-ol std|med|high] [-pl std|med|high] [-rl std|med|high] [-xe n|c] [-t <costtable:1,100>] [-p] [-k] [-r] [-w] [-smartguide <guidefile[.ncd]>] [-n <iterations:0,100>] [-s <savebest:1,100>] [-m <nodelistfile>] [-x] [-ub] [-nopad] [-power on|off] [-activityfile <activityfile[.vcd|.saif]>] [-ntd] [-intstyle ise|xflow|silent] [-ise <projectrepositoryfile>] [--strategy use_placement|keep_placement|ignore_placement]<infile[.ncd]> <outfile> [<constraintsfile[.pcf]>]
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MostRecentClient
bitgen
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SteInfoVersion
0.0
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CommandLine
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/trce -v 25 project_r.ncd project.pcf
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FormatString
trce ([-e|-v [<limit:0,2000000000>]] [-l <limit:0,2000000000>] [-n [<limit:0,2000000000>]] [-u [<limit:0,2000000000>]] [-skew] [-a] [--p] [-s <speed>] [-o <report[.twr]>] [--m] [-stamp <stampfile>] [-tsi <tsifile[.tsi]>] [-xml <report[.twx]>] [-nodatasheet] [-timegroups] [-fastpaths] [-intstyle ise|xflow|silent] [-ise <projectfile>] [--ucf <constraint[.ucf]>] <design[.ncd]> [<constraint[.pcf]>]) | ([-run <macro[.xtm]> [<design[.ncd]> [<constraint[.pcf]>]]] [-intstyle ise|xflow|silent] [-ise <projectfile>])
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CommandLine
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/xst -ifn project.xst -ofn project.log -finalclean 1
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FormatString
xst [-ifn <InputFile>] [-ofn <OutputFile>] [-ise <iseProjectFile>] [--quiet] [-intstyle <Style>] [--deb <DebugLevel>] [--finalclean <Clean>] [--PcubeFlow] [--globOptFlow] [--XstNtrc]
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ISE_VERSION_CREATED_WITH
10.1.03
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ISE_VERSION_LAST_SAVED_WITH
10.1.03
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LastRepoDir
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/logic/build/
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OBJSTORE_VERSION
1.3
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PROJECT_CREATION_TIMESTAMP
2010-11-11T14:37:07
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REGISTRY_VERSION
1.1
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REPOSITORY_VERSION
1.1
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REPOSITORY_VERSION
1.1
REGISTRY_VERSION
1.1
OBJSTORE_VERSION
1.3
ISE_VERSION_CREATED_WITH
10.1.03
ISE_VERSION_LAST_SAVED_WITH
10.1.03