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Updating prototype of SIE code generator.

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This commit is contained in:
Juan64Bits
2010-11-10 14:20:10 -05:00
parent d302857917
commit 9d578912b7
48 changed files with 1785 additions and 62 deletions
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12
KICAD_design_files/SAKC_PCB_v2/N_MODELS/J17.mod
View File

@@ -1,15 +1,15 @@
PCBNEW-LibModule-V1 23/2/2010-03:08:11
$INDEX
J17
POWER_CONN
$EndINDEX
$MODULE J17
$MODULE POWER_CONN
Po 0 0 0 15 43C58C74 4B834694 ~~
Li J17
Li POWER_CONN
Sc 4B834694
AR
Op 0 0 0
T0 0 -79 157 157 -1800 20 N V 21 "J17"
T1 0 118 118 118 -1800 20 N I 21 "HEADER 2"
T0 0 -79 157 157 -1800 20 N I 21 "POWER_CONN"
T1 0 118 118 118 -1800 20 N V 21 "VALUE"
DS -1650 2650 -1650 -3350 10 24
DS -1650 -3350 2350 -3350 10 24
DS 2350 -3350 2350 2650 10 24
@@ -39,5 +39,5 @@ At STD N 00C08001
Ne 0 ""
Po 1500 -1500
$EndPAD
$EndMODULE J17
$EndMODULE POWER_CONN
$EndLIBRARY

4
KICAD_design_files/SAKC_PCB_v2/SAKC.pro
View File

@@ -1,4 +1,4 @@
update=Mon 11 Oct 2010 12:34:05 PM COT
update=Mon 08 Nov 2010 07:59:46 PM COT
last_client=pcbnew
[general]
version=1
@@ -95,7 +95,7 @@ DrawLar=79
EdgeLar=79
TxtLar=120
MSegLar=79
LastNetListRead=
LastNetListRead=SAKC.net
[pcbnew/libraries]
LibDir=./N_MODELS/
LibName1=./N_MODELS/D8