Adding new Example PIC

Examples/PIC/logic/Makefile

@@ -0,0 +1,74 @@
+DESIGN          = PIC 
+PINS            = PIC.ucf
+DEVICE          = xc3s250e-VQ100-4
+BGFLAGS         = -g TdoPin:PULLNONE -g DonePin:PULLUP \
+                  -g CRC:enable -g StartUpClk:CCLK
+
+SIM_CMD         = /opt/cad/modeltech/bin/vsim 
+SIM_COMP_SCRIPT = simulation/$(DESIGN)_TB.do
+#SIM_INIT_SCRIPT = simulation/$(DESIGN)_init.do
+SIMGEN_OPTIONS  = -p $(FPGA_ARCH) -lang $(LANGUAGE)
+SAKC_IP         = 192.168.254.101
+
+SRC             = PIC.v 
+ 
+all:            bits
+
+remake:         clean-build all
+
+clean:
+	rm -f *~ */*~ a.out *.log *.key *.edf *.ps trace.dat
+	rm *.bit
+
+clean-build: clean
+	rm -rf build
+
+cleanall:   clean
+	rm -rf build $(DESIGN).bit
+
+bits:           $(DESIGN).bit
+
+#
+# Synthesis
+#
+build/project.src:
+	@[ -d build ] || mkdir build
+	@rm -f $@
+	for i in $(SRC); do echo verilog work ../$$i >> $@; done
+	for i in $(SRC_HDL); do echo VHDL work ../$$i >> $@; done
+
+build/project.xst: build/project.src
+	echo "run" > $@
+	echo "-top $(DESIGN) " >> $@
+	echo "-p $(DEVICE)" >> $@
+	echo "-opt_mode Area" >> $@
+	echo "-opt_level 1" >> $@
+	echo "-ifn project.src" >> $@
+	echo "-ifmt mixed" >> $@
+	echo "-ofn project.ngc" >> $@
+	echo "-ofmt NGC" >> $@
+	echo "-rtlview yes" >> $@
+
+build/project.ngc: build/project.xst $(SRC)
+	cd build && xst -ifn project.xst -ofn project.log
+
+build/project.ngd: build/project.ngc $(PINS)
+	cd build && ngdbuild -p $(DEVICE) project.ngc -uc ../$(PINS)
+
+build/project.ncd: build/project.ngd
+	cd build && map -pr b -p $(DEVICE) project
+
+build/project_r.ncd: build/project.ncd
+	cd build && par -w project project_r.ncd
+
+build/project_r.twr: build/project_r.ncd
+	cd build && trce -v 25 project_r.ncd project.pcf
+
+$(DESIGN).bit:  build/project_r.ncd build/project_r.twr
+	cd build && bitgen project_r.ncd -l -w $(BGFLAGS)
+	@mv -f build/project_r.bit $@
+sim: 
+	cd simulation; $(SIM_CMD) -do $(DESIGN)_TB.do 
+
+upload: $(DESIGN).bit
+	scp $(DESIGN).bit root@$(SAKC_IP): 

Examples/PIC/logic/PIC.ucf

@@ -0,0 +1,43 @@
+NET clk   LOC = "P38";
+NET reset LOC = "P71";
+NET led   LOC = "P44";
+
+#ADDRESS BUS
+NET "addr<12>" LOC = "P90";
+NET "addr<11>" LOC = "P91";
+NET "addr<10>" LOC = "P85";
+NET "addr<9>" LOC = "P92";
+NET "addr<8>" LOC = "P94";
+NET "addr<7>" LOC = "P95";
+NET "addr<6>" LOC = "P98";
+NET "addr<5>" LOC = "P3";
+NET "addr<4>" LOC = "P2";
+NET "addr<3>" LOC = "P78";
+NET "addr<2>" LOC = "P79";
+NET "addr<1>" LOC = "P83";
+NET "addr<0>" LOC = "P84";
+
+#DATA BUS
+NET "sram_data<7>"  LOC = "P4";
+NET "sram_data<6>"  LOC = "P5";
+NET "sram_data<5>"  LOC = "P9";
+NET "sram_data<4>"  LOC = "P10";
+NET "sram_data<3>"  LOC = "P11";
+NET "sram_data<2>"  LOC = "P12";
+NET "sram_data<1>"  LOC = "P15";
+NET "sram_data<0>"  LOC = "P16";
+
+#CONTROL BUS
+NET "nwe"   LOC = "P88";
+NET "noe"   LOC = "P86";
+NET "ncs"   LOC = "P69";
+
+#ADC
+#NET "ADC_EOC"    LOC = "P17";
+#NET "ADC_SCLK"   LOC = "P18";
+#NET "ADC_SDIN"   LOC = "P22";
+#NET "ADC_SDOUT"  LOC = "P23";
+#NET "ADC_CS"     LOC = "P24";
+#NET "ADC_CSTART" LOC = "P26";
+
+

Examples/PIC/logic/PIC.v

@@ -0,0 +1,79 @@
+module PIC   ( DI, DO, addr, 
+               ISRC_LP, nIRQ,
+               CS, nwe, noe,
+               MCLK,
+               RESET); 
+
+input  [7:0] DI;
+output [7:0] DO;
+input  [6:0] addr;
+input  [6:0] ISRC_LP;
+output nIRQ;
+input  CS, nwe, noe;
+input  MCLK, RESET;
+
+//------------------------------
+// registros internos
+
+
+reg nIRQ;
+
+reg [7:0] DO;  //Registro de salida.
+
+
+reg [7:0] IRQEnable;                    //Interrupt Mask
+reg	   IRQSoft;                     //Soft interrupt flag
+
+
+wire [7:0] ISRCF, IREG_LP;
+
+assign  ISRCF   = {ISRC_LP, IRQSoft};    //
+assign  IREG_LP = ( ISRCF  & IRQEnable); //
+
+
+always @(posedge MCLK)
+  begin
+    nIRQ <= ~(|IREG_LP);
+  end
+
+
+always @(CS or addr or noe or IREG_LP or ISRCF or IRQEnable)
+begin
+      if (~CS & noe)
+         begin
+           case (addr)
+             7'b0000000: DO<=IREG_LP;          //IRQStatus
+             7'b0000001: DO<=ISRCF;            //IRQRawStatus
+             7'b0000010: DO<=IRQEnable;        //IRQEnable
+             default:    DO<=8'b0;
+           endcase
+         end
+      else DO<=8'b0;
+end
+
+
+always @(posedge MCLK or posedge RESET)
+begin
+ if (RESET)
+    begin
+      IRQEnable <= 8'b0;
+      IRQSoft   <=  1'b0;
+    end
+ else
+    begin
+      if (~CS & nwe)
+         begin
+           case (addr)
+             7'b0000010: IRQEnable <= ( DI | IRQEnable); //EnableSet
+             7'b0000011: IRQEnable <= (~DI & IRQEnable); //EnableClear
+             7'b0000100: IRQSoft   <= DI[1];                   //Programmed IRQ       
+             default: ;
+           endcase
+         end
+    end
+end
+
+
+
+
+endmodule