qi-hardware/nn-usb-fpga
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Code
36d217d2a4
nn-usb-fpga/Kicad/Design files/PBCNANO
Carlos Camargo 710061371d First Kicad version With Errors
2010-03-18 07:36:06 -05:00

2250 lines
32 KiB
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# EESchema Netlist Version 1.1 created 21/2/2010-15:15:22
(
( /4B800ACD $noname U11 JZ4725 {Lib=JZ4725}
( 1 /LCD_D0 )
( 2 /LCD/LCD_CLK )
( 3 GND )
( 4 N-000080 )
( 5 /A3 )
( 6 /A2 )
( 7 /A1 )
( 8 /A0 )
( 9 /A10 )
( 10 /MEMORY/DCS0_N )
( 11 /MEMORY/RAS_N )
( 12 /MEMORY/CAS_N )
( 13 /FPGA/RDWR_N )
( 14 /FPGA/WE0_N )
( 15 /FPGA/WE1_N )
( 16 /MEMORY/CK0 )
( 17 /MEMORY/CKE )
( 18 /A12 )
( 19 /A11 )
( 20 GND )
( 21 N-000080 )
( 22 /A9 )
( 23 /A8 )
( 24 /VDDIO )
( 25 GND )
( 26 /A7 )
( 27 /A6 )
( 28 /A5 )
( 29 /A4 )
( 30 ? )
( 31 ? )
( 32 ? )
( 33 ? )
( 34 ? )
( 35 ? )
( 36 ? )
( 37 ? )
( 38 ? )
( 39 ? )
( 40 /D0 )
( 41 /D1 )
( 42 /D2 )
( 43 /D3 )
( 44 /D4 )
( 45 /D5 )
( 46 /D6 )
( 47 /D7 )
( 48 /FPGA/TCK_F )
( 49 /MEMORY/NF_ALE )
( 50 /MEMORY/NF_CLE )
( 51 /MEMORY/FWE_N )
( 52 /MEMORY/FRE_N )
( 53 /MEMORY/FRB_N )
( 54 /MEMORY/SD_CD_N )
( 55 /FPGA/CS2_N )
( 56 /MEMORY/CS1_N )
( 57 /UART_USB_I2C/RXD )
( 58 /UART_USB_I2C/TXD )
( 59 /FPGA/TDO_F )
( 60 /FPGA/TMS_F )
( 61 /MEMORY/MSC_D0 )
( 62 /MEMORY/MSC_CLK )
( 63 /MEMORY/MSC_CMD )
( 64 /EXTAL )
( 65 /XTAL )
( 66 /VDDIO )
( 67 /CONNECTORS/ADIN0 )
( 68 /CONNECTORS/ADIN1 )
( 69 GND )
( 70 N-000065 )
( 71 N-000062 )
( 72 GND )
( 73 N-000062 )
( 74 GND )
( 75 /VDDA )
( 76 /RREF )
( 77 N-000064 )
( 78 /DM0 )
( 79 /DP0 )
( 80 GND )
( 81 /RCLK )
( 82 /RCLK0 )
( 83 /FPGA/3V3 )
( 84 /RESET_N )
( 85 ? )
( 86 ? )
( 87 N-000063 )
( 88 /CONNECTORS/R-HPO )
( 89 GND )
( 90 /CONNECTORS/L-HPO )
( 91 N-000063 )
( 92 GND )
( 93 /FPGA/3V3 )
( 94 /VREF )
( 95 /FPGA/3V3 )
( 96 GND )
( 97 /CONNECTORS/L-LINEIN )
( 98 /CONNECTORS/R-LINEIN )
( 99 /CONNECTORS/MICIN )
( 100 /UBOOT )
( 101 N-000076 )
( 102 ? )
( 103 ? )
( 104 /VDDIO )
( 105 /LCD/LCD_SCL )
( 106 GND )
( 107 /LCD/LCD_SDA )
( 108 /LCD/LCD_VSYNC )
( 109 /LCD/LCD_HSYNC )
( 110 /LCD/LCD_DE )
( 111 ? )
( 112 ? )
( 113 ? )
( 114 ? )
( 115 ? )
( 116 ? )
( 117 ? )
( 118 ? )
( 119 ? )
( 120 ? )
( 121 /LCD_D7 )
( 122 /LCD_D6 )
( 123 /LCD_D5 )
( 124 /LCD_D4 )
( 125 GND )
( 126 /LCD_D3 )
( 127 /LCD_D2 )
( 128 /LCD_D1 )
)
( /4B782F3E $noname J15 HEADER_2 {Lib=HEADER_2}
( 1 /UBOOT )
( 2 GND )
)
( /4B76C746 $noname C14 100n {Lib=C}
( 1 /VDDIO )
( 2 GND )
)
( /4B76C743 $noname C13 100n {Lib=C}
( 1 /VDDIO )
( 2 GND )
)
( /4B76C742 $noname C12 100n {Lib=C}
( 1 /VDDIO )
( 2 GND )
)
( /4B76C741 $noname C11 10u {Lib=C}
( 1 /VDDIO )
( 2 GND )
)
( /4B76C740 $noname L6 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /FPGA/3V3 )
( 2 /VDDIO )
)
( /4B76C739 $noname C10 10u {Lib=C}
( 1 N-000080 )
( 2 GND )
)
( /4B76C738 $noname C9 100n {Lib=C}
( 1 N-000080 )
( 2 GND )
)
( /4B76C737 $noname L5 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /POWER_SUPPLY/1.8v )
( 2 N-000080 )
)
( /4B76C72D $noname C8 10n {Lib=C}
( 1 N-000062 )
( 2 GND )
)
( /4B76C725 $noname C6 10u {Lib=C}
( 1 N-000062 )
( 2 GND )
)
( /4B76C6EA $noname C4 100n {Lib=C}
( 1 N-000062 )
( 2 GND )
)
( /4B76C6EB $noname L4 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /POWER_SUPPLY/1.8v )
( 2 N-000062 )
)
( /4B76C6DD $noname L3 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /FPGA/3V3 )
( 2 N-000063 )
)
( /4B76C6DC $noname C3 10u {Lib=C}
( 1 N-000063 )
( 2 GND )
)
( /4B76C6D5 $noname L2 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /FPGA/3V3 )
( 2 N-000064 )
)
( /4B76C6D4 $noname C2 1u {Lib=C}
( 1 N-000064 )
( 2 GND )
)
( /4B76C699 $noname L1 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /FPGA/3V3 )
( 2 N-000065 )
)
( /4B76C584 $noname C1 1u {Lib=C}
( 1 N-000065 )
( 2 GND )
)
( /4B76C4B3 $noname C15 100n {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B76C4AB $noname R4 47K {Lib=R}
( 1 /FPGA/3V3 )
( 2 /RESET_N )
)
( /4B76C4A6 $noname C16 1u {Lib=C}
( 1 /RESET_N )
( 2 GND )
)
( /4B76C49E $noname R5 470K {Lib=R}
( 1 /RESET_N )
( 2 GND )
)
( /4B76C495 $noname C17 100n {Lib=C}
( 1 /RESET_N )
( 2 GND )
)
( /4B76C3E8 $noname R3 2.5K {Lib=R}
( 1 /RREF )
( 2 GND )
)
( /4B76C3DD $noname C7 1u {Lib=C}
( 1 /VDDA )
( 2 GND )
)
( /4B76C3D6 $noname C5 1u {Lib=C}
( 1 /VREF )
( 2 GND )
)
( /4B76C163 $noname R2 47K {Lib=R}
( 1 N-000076 )
( 2 /FPGA/3V3 )
)
( /4B76C152 $noname R1 47K {Lib=R}
( 1 /UBOOT )
( 2 /FPGA/3V3 )
)
( /4B76BB63 $noname SW1 RESET {Lib=SW_PUSH}
( 1 N-000073 )
( 2 GND )
)
( /4B743A8B $noname U1 MIC811 {Lib=MIC811}
( 1 GND )
( 2 /RESET_N )
( 3 N-000073 )
( 4 /FPGA/3V3 )
)
( /4B743741 $noname C19 22p {Lib=C}
( 1 GND )
( 2 /RCLK )
)
( /4B743740 $noname C18 22p {Lib=C}
( 1 GND )
( 2 N-000069 )
)
( /4B74373F $noname X1 32.768KHz {Lib=CRYSTAL}
( 1 N-000069 )
( 2 /RCLK )
)
( /4B74373E $noname R6 1.5K {Lib=R}
( 1 N-000069 )
( 2 /RCLK0 )
)
( /4B74373D $noname R8 10M {Lib=R}
( 1 N-000069 )
( 2 /RCLK )
)
( /4B74360C $noname C21 22p {Lib=C}
( 1 GND )
( 2 /EXTAL )
)
( /4B743601 $noname C20 22p {Lib=C}
( 1 GND )
( 2 N-000070 )
)
( /4B7435E9 $noname X2 12MHz {Lib=CRYSTAL}
( 1 N-000070 )
( 2 /EXTAL )
)
( /4B7435C9 $noname R7 33 {Lib=R}
( 1 N-000070 )
( 2 /XTAL )
)
( /4B7435BB $noname R9 1M {Lib=R}
( 1 N-000070 )
( 2 /EXTAL )
)
( /4B76E46B/4B76F778 $noname R21 R {Lib=R}
( 1 /MEMORY/3.3V )
( 2 /MEMORY/SD_CD_N )
)
( /4B76E46B/4B76F6CE $noname R16 33 {Lib=R}
( 1 N-000176 )
( 2 /MEMORY/MSC_CLK )
)
( /4B76E46B/4B76F69F $noname C35 100n {Lib=C}
( 1 GND )
( 2 /MEMORY/3.3V )
)
( /4B76E46B/4B76F675 $noname R17 47K {Lib=R}
( 1 /MEMORY/3.3V )
( 2 /MEMORY/MSC_D0 )
)
( /4B76E46B/4B76F671 $noname R20 47K {Lib=R}
( 1 /MEMORY/3.3V )
( 2 N-000185 )
)
( /4B76E46B/4B76F670 $noname R22 47K {Lib=R}
( 1 /MEMORY/3.3V )
( 2 N-000177 )
)
( /4B76E46B/4B76F643 $noname R18 47K {Lib=R}
( 1 /MEMORY/3.3V )
( 2 /MEMORY/MSC_CMD )
)
( /4B76E46B/4B76F5F6 $noname R19 47K {Lib=R}
( 1 /MEMORY/3.3V )
( 2 N-000186 )
)
( /4B76E46B/4B76F5E2 $noname J16 MICROSD {Lib=MICROSD}
( CASE GND )
( CD /MEMORY/SD_CD_N )
( COM GND )
( 1 N-000177 )
( 2 N-000185 )
( 3 /MEMORY/MSC_CMD )
( 4 /MEMORY/3.3V )
( 5 N-000176 )
( 6 GND )
( 7 /MEMORY/MSC_D0 )
( 8 N-000186 )
)
( /4B76E46B/4B76F3CE $noname C45 100n {Lib=C}
( 1 /MEMORY/3.3V )
( 2 GND )
)
( /4B76E46B/4B76F3C1 $noname C44 100n {Lib=C}
( 1 /MEMORY/3.3V )
( 2 GND )
)
( /4B76E46B/4B76F3B5 $noname C43 10u {Lib=C}
( 1 /MEMORY/3.3V )
( 2 GND )
)
( /4B76E46B/4B76F1E9 $noname R23 47K {Lib=R}
( 1 /MEMORY/3.3V )
( 2 /MEMORY/FRB_N )
)
( /4B76E46B/4B76F108 $noname U5 HY27UG088G5M {Lib=HY27UG088G5M}
( 1 ? )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 /MEMORY/FRB_N )
( 7 /MEMORY/FRB_N )
( 8 /MEMORY/FRE_N )
( 9 /MEMORY/CS1_N )
( 10 /FPGA/CS2_N )
( 11 ? )
( 12 /MEMORY/3.3V )
( 13 GND )
( 14 ? )
( 15 ? )
( 16 /MEMORY/NF_CLE )
( 17 /MEMORY/NF_ALE )
( 18 /MEMORY/FWE_N )
( 19 /MEMORY/3.3V )
( 20 ? )
( 21 ? )
( 22 ? )
( 23 ? )
( 24 ? )
( 25 ? )
( 26 ? )
( 27 ? )
( 28 ? )
( 29 /MEMORY/D0 )
( 30 /MEMORY/D1 )
( 31 /MEMORY/D2 )
( 32 /MEMORY/D3 )
( 33 ? )
( 34 ? )
( 35 ? )
( 36 GND )
( 37 /MEMORY/3.3V )
( 38 ? )
( 39 ? )
( 40 ? )
( 41 /MEMORY/D4 )
( 42 /MEMORY/D5 )
( 43 /MEMORY/D6 )
( 44 /MEMORY/D7 )
( 45 ? )
( 46 ? )
( 47 ? )
( 48 ? )
)
( /4B76E46B/4B76E647 $noname R15 33 {Lib=R}
( 1 N-000184 )
( 2 /MEMORY/CK0 )
)
( /4B76E46B/4B76E5E9 $noname C36 0.1u {Lib=C}
( 1 GND )
( 2 N-000183 )
)
( /4B76E46B/4B76E5E6 $noname C37 0.1u {Lib=C}
( 1 GND )
( 2 N-000178 )
)
( /4B76E46B/4B76E5E3 $noname C38 0.1u {Lib=C}
( 1 GND )
( 2 N-000182 )
)
( /4B76E46B/4B76E5E0 $noname C40 0.1u {Lib=C}
( 1 GND )
( 2 /MEMORY/3.3V )
)
( /4B76E46B/4B76E5DE $noname C39 0.1u {Lib=C}
( 1 GND )
( 2 N-000179 )
)
( /4B76E46B/4B76E5DA $noname C41 0.1u {Lib=C}
( 1 GND )
( 2 N-000180 )
)
( /4B76E46B/4B76E56D $noname C42 0.1u {Lib=C}
( 1 GND )
( 2 N-000181 )
)
( /4B76E46B/4B76E4E1 $noname U4 P3V56S40ETP-G6 {Lib=P3V56S40ETP-G6}
( 1 /MEMORY/3.3V )
( 2 /MEMORY/D0 )
( 3 N-000179 )
( 4 /MEMORY/D1 )
( 5 /MEMORY/D2 )
( 6 GND )
( 7 /MEMORY/D3 )
( 8 /MEMORY/D4 )
( 9 N-000182 )
( 10 /MEMORY/D5 )
( 11 /MEMORY/D6 )
( 12 GND )
( 13 /MEMORY/D7 )
( 14 N-000181 )
( 15 /FPGA/WE0_N )
( 16 /FPGA/RDWR_N )
( 17 /MEMORY/CAS_N )
( 18 /MEMORY/RAS_N )
( 19 /MEMORY/DCS0_N )
( 20 ? )
( 21 ? )
( 22 ? )
( 23 ? )
( 24 ? )
( 25 ? )
( 26 ? )
( 27 N-000180 )
( 28 GND )
( 29 ? )
( 30 ? )
( 31 ? )
( 32 ? )
( 33 ? )
( 34 ? )
( 35 ? )
( 36 ? )
( 37 /MEMORY/CKE )
( 38 N-000184 )
( 39 /FPGA/WE1_N )
( 40 ? )
( 41 GND )
( 42 ? )
( 43 N-000183 )
( 44 ? )
( 45 ? )
( 46 GND )
( 47 ? )
( 48 ? )
( 49 N-000178 )
( 50 ? )
( 51 ? )
( 52 GND )
( 53 ? )
( 54 GND )
)
( /4B7C6557/4B7C65FB $noname J18 HEADER_4X2 {Lib=HEADER_4X2}
( 1 /CONNECTORS/ADIN1 )
( 3 /CONNECTORS/R-HPO )
( 4 /CONNECTORS/L-HPO )
( 5 /CONNECTORS/L-LINEIN )
( 6 /CONNECTORS/R-LINEIN )
( 7 GND )
( 8 /CONNECTORS/MICIN )
)
( /4B7C6557/4B7C65CF $noname J19 HEADER_20X2 {Lib=HEADER_20X2}
( 1 GND )
( 2 /FPGA/DIG13 )
( 3 /FPGA/DIG12 )
( 4 /FPGA/DIG11 )
( 5 /FPGA/DIG10 )
( 6 /FPGA/DIG9 )
( 7 /FPGA/DIG8 )
( 8 /FPGA/DIG7 )
( 9 /FPGA/DIG6 )
( 10 /FPGA/DIG5 )
( 11 /FPGA/DIG4 )
( 12 /FPGA/DIG3 )
( 13 /FPGA/DIG2 )
( 14 /FPGA/DIG1 )
( 15 /FPGA/DIG0 )
( 16 /FPGA/DIG14 )
( 17 /FPGA/DIG15 )
( 18 /FPGA/DIG16 )
( 19 /FPGA/DIG17 )
( 20 /FPGA/DIG18 )
( 21 /FPGA/DIG19 )
( 22 /FPGA/DIG20 )
( 23 /FPGA/DIG21 )
( 24 /FPGA/DIG22 )
( 25 /FPGA/DIG23 )
( 26 GND )
( 27 /FPGA/3V3 )
( 28 /FPGA/3V3 )
( 29 /FPGA/3V3 )
( 30 /FPGA/3V3 )
( 31 /CONNECTORS/ANALOG6 )
( 32 /CONNECTORS/ANALOG7 )
( 33 /CONNECTORS/ANALOG4 )
( 34 /CONNECTORS/ANALOG5 )
( 35 /CONNECTORS/ANALOG2 )
( 36 /CONNECTORS/ANALOG3 )
( 37 /CONNECTORS/ANALOG0 )
( 38 /CONNECTORS/ANALOG1 )
( 39 /CONNECTORS/AN_GND )
( 40 /CONNECTORS/AN_GND )
)
( /4B782FB9/4B782402 $noname J17 FPCCON24 {Lib=FPCCON24}
( 1 GND )
( 2 GND )
( 3 GND )
( 4 N-000223 )
( 5 N-000223 )
( 6 N-000223 )
( 7 N-000223 )
( 8 GND )
( 9 N-000220 )
( 10 N-000219 )
( 11 N-000218 )
( 12 N-000217 )
( 13 N-000221 )
( 14 N-000216 )
( 15 N-000222 )
( 16 N-000215 )
( 17 N-000224 )
( 18 /LCD/LCD_VSYNC )
( 19 /LCD/LCD_HSYNC )
( 20 /LCD/LCD_DE )
( 21 /LCD/LCD_SCL )
( 22 /LCD/LCD_SDA )
( 23 GND )
( 24 GND )
)
( /4B782FB9/4B782344 $noname L8 PZ1608D221 {Lib=INDUCTOR}
( 1 /LCD/LCD_CLK )
( 2 N-000224 )
)
( /4B782FB9/4B7822E4 $noname L7 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /FPGA/3V3 )
( 2 N-000223 )
)
( /4B782FB9/4B78225F $noname C46 100n {Lib=C}
( 1 N-000223 )
( 2 GND )
)
( /4B782FB9/4B782255 $noname C47 10u {Lib=C}
( 1 N-000223 )
( 2 GND )
)
( /4B782FB9/4B7820D3 $noname RP1 33/5% {Lib=R_PACK4}
( 1 /LCD_D7 )
( 2 /LCD_D6 )
( 3 /LCD_D5 )
( 4 /LCD_D4 )
( 5 N-000217 )
( 6 N-000218 )
( 7 N-000219 )
( 8 N-000220 )
)
( /4B782FB9/4B7820E7 $noname RP2 33/5% {Lib=R_PACK4}
( 1 /LCD_D3 )
( 2 /LCD_D2 )
( 3 /LCD_D1 )
( 4 /LCD_D0 )
( 5 N-000215 )
( 6 N-000222 )
( 7 N-000216 )
( 8 N-000221 )
)
( /4B7FDF00/4B7FE370 $noname J24 HEADER_2 {Lib=HEADER_2}
( 1 N-000238 )
( 2 ? )
)
( /4B7FDF00/4B7FE38F $noname C60 100n {Lib=C}
( 1 N-000239 )
( 2 GND )
)
( /4B7FDF00/4B7FE317 $noname L11 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 N-000237 )
( 2 GND )
)
( /4B7FDF00/4B7FE30E $noname L10 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 N-000227 )
( 2 N-000238 )
)
( /4B7FDF00/4B7FE2D4 $noname J21 ZX62D-B-5P8 {Lib=ZX62D-B-5P8}
( 1 N-000227 )
( 2 /DM0 )
( 3 /DP0 )
( 4 N-000237 )
( 5 N-000237 )
( 6 N-000239 )
( 7 N-000239 )
( 8 N-000239 )
( 9 N-000239 )
)
( /4B7FDF00/4B7FE1C9 $noname R27 4.7K {Lib=R}
( 1 /FPGA/3V3 )
( 2 /FPGA/TDO_F )
)
( /4B7FDF00/4B7FE1C0 $noname R26 4.7K {Lib=R}
( 1 /FPGA/3V3 )
( 2 /FPGA/TMS_F )
)
( /4B7FDF00/4B7FE108 $noname J22 HEADER_4 {Lib=HEADER_4}
( 1 /UART_USB_I2C/TX1 )
( 2 /UART_USB_I2C/RX1 )
( 3 GND )
( 4 /FPGA/3V3 )
)
( /4B7FDF00/4B7FE0F4 $noname J23 HEADER_4 {Lib=HEADER_4}
( 1 /FPGA/TDO_F )
( 2 /FPGA/TMS_F )
( 3 GND )
( 4 /FPGA/3V3 )
)
( /4B7FDF00/4B7FE07F $noname C57 100n {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B7FDF00/4B7FE076 $noname C58 100n {Lib=C}
( 1 GND )
( 2 N-000235 )
)
( /4B7FDF00/4B7FE06A $noname C59 100n {Lib=C}
( 1 GND )
( 2 N-000229 )
)
( /4B7FDF00/4B7FDF9E $noname D2 LED {Lib=LED}
( 1 /FPGA/3V3 )
( 2 N-000230 )
)
( /4B7FDF00/4B7FDF7F $noname R24 R {Lib=R}
( 1 /FPGA/3V3 )
( 2 /UART_USB_I2C/TXD )
)
( /4B7FDF00/4B7FDF76 $noname R25 R {Lib=R}
( 1 N-000230 )
( 2 /UART_USB_I2C/TXD )
)
( /4B7FDF00/4B7FDF54 $noname C56 C {Lib=C}
( 1 N-000234 )
( 2 N-000231 )
)
( /4B7FDF00/4B7FDF48 $noname C55 C {Lib=C}
( 1 N-000233 )
( 2 N-000232 )
)
( /4B7FDF00/4B7FDF3C $noname U10 MAX3223ECAPAA {Lib=MAX3223ECAPAA}
( 1 GND )
( 2 N-000233 )
( 3 N-000235 )
( 4 N-000232 )
( 5 N-000234 )
( 6 N-000231 )
( 7 N-000229 )
( 8 /UART_USB_I2C/TX1 )
( 9 /UART_USB_I2C/RX1 )
( 10 /UART_USB_I2C/RXD )
( 11 ? )
( 12 /UART_USB_I2C/TXD )
( 13 /UART_USB_I2C/TXD )
( 14 /FPGA/3V3 )
( 15 ? )
( 16 ? )
( 17 ? )
( 18 GND )
( 19 /FPGA/3V3 )
( 20 /FPGA/3V3 )
)
( /4B7FDD85/4B7C62AC $noname L9 HZ0805C202R-00 {Lib=INDUCTOR}
( 1 /CONNECTORS/AN_GND )
( 2 GND )
)
( /4B7FDD85/4B7C620D $noname U9 TLV1548 {Lib=TLV1548}
( 1 /CONNECTORS/ANALOG0 )
( 2 /CONNECTORS/ANALOG1 )
( 3 /CONNECTORS/ANALOG2 )
( 4 /CONNECTORS/ANALOG3 )
( 5 /CONNECTORS/ANALOG4 )
( 6 /CONNECTORS/ANALOG5 )
( 7 /CONNECTORS/ANALOG6 )
( 8 /CONNECTORS/ANALOG7 )
( 9 /FPGA/ADC_CSTART )
( 10 /CONNECTORS/AN_GND )
( 11 /FPGA/3V3 )
( 12 /FPGA/3V3 )
( 13 /CONNECTORS/AN_GND )
( 14 /FPGA/3V3 )
( 15 /FPGA/ADC_CS )
( 16 /FPGA/ADC_SDOUT )
( 17 /FPGA/ADC_SDIN )
( 18 /FPGA/ADC_SCLK )
( 19 /FPGA/ADC_EOC )
( 20 /FPGA/3V3 )
)
( /4B7C6A2F/4B7C701D $noname J14 HOLE4 {Lib=HOLE}
)
( /4B7C6A2F/4B7C701B $noname J13 HOLE3 {Lib=HOLE}
)
( /4B7C6A2F/4B7C7019 $noname J12 HOLE1 {Lib=HOLE}
)
( /4B7C6A2F/4B7C7014 $noname J11 HOLE1 {Lib=HOLE}
)
( /4B7C6A2F/4B7C6CC3 $noname C54 100n {Lib=C}
( 1 /FPGA/2V5 )
( 2 GND )
)
( /4B7C6A2F/4B7C6CBE $noname C53 100n {Lib=C}
( 1 /FPGA/1V2 )
( 2 GND )
)
( /4B7C6A2F/4B7C6CBC $noname C52 100n {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B7C6A2F/4B7C6CBA $noname C49 100n {Lib=C}
( 1 /POWER_SUPPLY/1.8v )
( 2 GND )
)
( /4B7C6A2F/4B7C6CB7 $noname C48 100n {Lib=C}
( 1 /POWER_SUPPLY/BAT_V )
( 2 GND )
)
( /4B7C6A2F/4B7C6CB4 $noname C50 100n {Lib=C}
( 1 /POWER_SUPPLY/BAT_V )
( 2 GND )
)
( /4B7C6A2F/4B7C6CB1 $noname C51 100n {Lib=C}
( 1 /POWER_SUPPLY/BAT_V )
( 2 GND )
)
( /4B7C6A2F/4B7C6CA6 $noname J20 HEADER_2 {Lib=HEADER_2}
( 1 GND )
( 2 /POWER_SUPPLY/BAT_V )
)
( /4B7C6A2F/4B7C6C99 $noname U6 LT1117CST-1.8 {Lib=LT1117CST}
( 1 GND )
( 2 /POWER_SUPPLY/1.8v )
( 3 /POWER_SUPPLY/BAT_V )
( 4 /POWER_SUPPLY/1.8v )
)
( /4B7C6A2F/4B7C6C43 $noname UF1 LP3988IMF-2.5/MIC5205-2.5YM5TR {Lib=LP3988IMF}
( 1 /FPGA/3V3 )
( 2 GND )
( 3 /FPGA/3V3 )
( 4 ? )
( 5 /FPGA/2V5 )
)
( /4B7C6A2F/4B7C6C38 $noname U8 LT1117CST-1.2 {Lib=LT1117CST}
( 1 GND )
( 2 /FPGA/1V2 )
( 3 /POWER_SUPPLY/BAT_V )
( 4 /FPGA/1V2 )
)
( /4B7C6A2F/4B7C6C33 $noname U7 LT1117CST-3.3 {Lib=LT1117CST}
( 1 GND )
( 2 /FPGA/3V3 )
( 3 /POWER_SUPPLY/BAT_V )
( 4 /FPGA/3V3 )
)
( /4B76CE5F/4B76E30B $noname Y1 X_MHZ_OSC {Lib=X_MHZ_OSC}
( 1 /FPGA/3V3 )
( 2 GND )
( 3 /FPGA/OSC_XM )
( 4 /FPGA/3V3 )
)
( /4B76CE5F/4B76E1FA $noname C22 C {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B76CE5F/4B76E040 $noname C32 100n {Lib=C}
( 1 /FPGA/2V5 )
( 2 GND )
)
( /4B76CE5F/4B76E03F $noname C31 100n {Lib=C}
( 1 /FPGA/2V5 )
( 2 GND )
)
( /4B76CE5F/4B76E03E $noname C34 100n {Lib=C}
( 1 /FPGA/2V5 )
( 2 GND )
)
( /4B76CE5F/4B76E03D $noname C33 100n {Lib=C}
( 1 /FPGA/2V5 )
( 2 GND )
)
( /4B76CE5F/4B76E039 $noname C28 100n {Lib=C}
( 1 /FPGA/1V2 )
( 2 GND )
)
( /4B76CE5F/4B76E038 $noname C27 100n {Lib=C}
( 1 /FPGA/1V2 )
( 2 GND )
)
( /4B76CE5F/4B76E037 $noname C30 100n {Lib=C}
( 1 /FPGA/1V2 )
( 2 GND )
)
( /4B76CE5F/4B76E036 $noname C29 100n {Lib=C}
( 1 /FPGA/1V2 )
( 2 GND )
)
( /4B76CE5F/4B76DFB1 $noname C24 100n {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B76CE5F/4B76DFB0 $noname C23 100n {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B76CE5F/4B76DFA8 $noname C26 100n {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B76CE5F/4B76DFA4 $noname C25 100n {Lib=C}
( 1 /FPGA/3V3 )
( 2 GND )
)
( /4B76CE5F/4B76D642 $noname R14 68 {Lib=R}
( 1 /FPGA/TMS_F )
( 2 N-000165 )
)
( /4B76CE5F/4B76D641 $noname R13 68 {Lib=R}
( 1 /FPGA/TDO_F )
( 2 N-000170 )
)
( /4B76CE5F/4B76D63C $noname R12 68 {Lib=R}
( 1 /FPGA/TCK_F )
( 2 N-000166 )
)
( /4B76CE5F/4B76D5E5 $noname R11 68 {Lib=R}
( 1 /FPGA/WE1_N )
( 2 N-000169 )
)
( /4B76CE5F/4B76D3C1 $noname R10 R {Lib=R}
( 1 N-000168 )
( 2 GND )
)
( /4B76CE5F/4B76D3B0 $noname D1 LED {Lib=LED}
( 1 N-000167 )
( 2 N-000168 )
)
( /4B76CE5F/4B76CE40 $noname U3 XC3SXXXE-VQ100 {Lib=XC3SXXXE-VQ100}
( 1 ? )
( 2 /A4 )
( 3 /A5 )
( 4 /D7 )
( 5 /D6 )
( 6 /FPGA/1V2 )
( 7 GND )
( 8 /FPGA/3V3 )
( 9 /D5 )
( 10 /D4 )
( 11 /D3 )
( 12 /D2 )
( 13 ? )
( 14 GND )
( 15 /D1 )
( 16 /D0 )
( 17 /FPGA/ADC_EOC )
( 18 /FPGA/ADC_SCLK )
( 19 GND )
( 20 /FPGA/3V3 )
( 21 /FPGA/2V5 )
( 22 /FPGA/ADC_SDIN )
( 23 /FPGA/ADC_SDOUT )
( 24 /FPGA/ADC_CS )
( 25 ? )
( 26 /FPGA/ADC_CSTART )
( 27 ? )
( 28 /FPGA/1V2 )
( 29 GND )
( 30 ? )
( 31 /FPGA/3V3 )
( 32 /FPGA/DIG23 )
( 33 /FPGA/DIG22 )
( 34 /FPGA/DIG21 )
( 35 /FPGA/DIG20 )
( 36 /FPGA/DIG19 )
( 37 GND )
( 38 /FPGA/OSC_XM )
( 39 /FPGA/3V3 )
( 40 /FPGA/DIG18 )
( 41 /FPGA/DIG17 )
( 42 GND )
( 43 /FPGA/3V3 )
( 44 N-000167 )
( 45 /FPGA/3V3 )
( 46 /FPGA/2V5 )
( 47 /FPGA/DIG16 )
( 48 /FPGA/DIG15 )
( 49 /FPGA/DIG14 )
( 50 GND )
( 51 ? )
( 52 GND )
( 53 /FPGA/DIG0 )
( 54 /FPGA/DIG1 )
( 55 /FPGA/3V3 )
( 56 /FPGA/1V2 )
( 57 /FPGA/DIG2 )
( 58 /FPGA/DIG3 )
( 59 GND )
( 60 /FPGA/DIG4 )
( 61 /FPGA/DIG5 )
( 62 /FPGA/DIG6 )
( 63 /FPGA/DIG7 )
( 64 GND )
( 65 /FPGA/DIG8 )
( 66 /FPGA/DIG9 )
( 67 /FPGA/DIG10 )
( 68 /FPGA/DIG11 )
( 69 /FPGA/CS2_N )
( 70 /FPGA/DIG12 )
( 71 /FPGA/DIG13 )
( 72 GND )
( 73 /FPGA/3V3 )
( 74 /FPGA/2V5 )
( 75 N-000165 )
( 76 N-000170 )
( 77 N-000166 )
( 78 /A3 )
( 79 /A2 )
( 80 /FPGA/1V2 )
( 81 GND )
( 82 /FPGA/3V3 )
( 83 /A1 )
( 84 /A0 )
( 85 /A10 )
( 86 /FPGA/RDWR_N )
( 87 GND )
( 88 /FPGA/WE0_N )
( 89 /FPGA/WE1_N )
( 90 /A12 )
( 91 /A11 )
( 92 /A9 )
( 93 GND )
( 94 /A8 )
( 95 /A7 )
( 96 /FPGA/2V5 )
( 97 /FPGA/3V3 )
( 98 /A6 )
( 99 /FPGA/3V3 )
( 100 N-000169 )
)
)
*
{ Allowed footprints by component:
$component C14
SM*
C?
C1-1
$endlist
$component C13
SM*
C?
C1-1
$endlist
$component C12
SM*
C?
C1-1
$endlist
$component C11
SM*
C?
C1-1
$endlist
$component C10
SM*
C?
C1-1
$endlist
$component C9
SM*
C?
C1-1
$endlist
$component C8
SM*
C?
C1-1
$endlist
$component C6
SM*
C?
C1-1
$endlist
$component C4
SM*
C?
C1-1
$endlist
$component C3
SM*
C?
C1-1
$endlist
$component C2
SM*
C?
C1-1
$endlist
$component C1
SM*
C?
C1-1
$endlist
$component C15
SM*
C?
C1-1
$endlist
$component R4
R?
SM0603
SM0805
$endlist
$component C16
SM*
C?
C1-1
$endlist
$component R5
R?
SM0603
SM0805
$endlist
$component C17
SM*
C?
C1-1
$endlist
$component R3
R?
SM0603
SM0805
$endlist
$component C7
SM*
C?
C1-1
$endlist
$component C5
SM*
C?
C1-1
$endlist
$component R2
R?
SM0603
SM0805
$endlist
$component R1
R?
SM0603
SM0805
$endlist
$component C19
SM*
C?
C1-1
$endlist
$component C18
SM*
C?
C1-1
$endlist
$component R6
R?
SM0603
SM0805
$endlist
$component R8
R?
SM0603
SM0805
$endlist
$component C21
SM*
C?
C1-1
$endlist
$component C20
SM*
C?
C1-1
$endlist
$component R7
R?
SM0603
SM0805
$endlist
$component R9
R?
SM0603
SM0805
$endlist
$component R21
R?
SM0603
SM0805
$endlist
$component R16
R?
SM0603
SM0805
$endlist
$component C35
SM*
C?
C1-1
$endlist
$component R17
R?
SM0603
SM0805
$endlist
$component R20
R?
SM0603
SM0805
$endlist
$component R22
R?
SM0603
SM0805
$endlist
$component R18
R?
SM0603
SM0805
$endlist
$component R19
R?
SM0603
SM0805
$endlist
$component C45
SM*
C?
C1-1
$endlist
$component C44
SM*
C?
C1-1
$endlist
$component C43
SM*
C?
C1-1
$endlist
$component R23
R?
SM0603
SM0805
$endlist
$component R15
R?
SM0603
SM0805
$endlist
$component C36
SM*
C?
C1-1
$endlist
$component C37
SM*
C?
C1-1
$endlist
$component C38
SM*
C?
C1-1
$endlist
$component C40
SM*
C?
C1-1
$endlist
$component C39
SM*
C?
C1-1
$endlist
$component C41
SM*
C?
C1-1
$endlist
$component C42
SM*
C?
C1-1
$endlist
$component C46
SM*
C?
C1-1
$endlist
$component C47
SM*
C?
C1-1
$endlist
$component C60
SM*
C?
C1-1
$endlist
$component R27
R?
SM0603
SM0805
$endlist
$component R26
R?
SM0603
SM0805
$endlist
$component C57
SM*
C?
C1-1
$endlist
$component C58
SM*
C?
C1-1
$endlist
$component C59
SM*
C?
C1-1
$endlist
$component R24
R?
SM0603
SM0805
$endlist
$component R25
R?
SM0603
SM0805
$endlist
$component C56
SM*
C?
C1-1
$endlist
$component C55
SM*
C?
C1-1
$endlist
$component C54
SM*
C?
C1-1
$endlist
$component C53
SM*
C?
C1-1
$endlist
$component C52
SM*
C?
C1-1
$endlist
$component C49
SM*
C?
C1-1
$endlist
$component C48
SM*
C?
C1-1
$endlist
$component C50
SM*
C?
C1-1
$endlist
$component C51
SM*
C?
C1-1
$endlist
$component C22
SM*
C?
C1-1
$endlist
$component C32
SM*
C?
C1-1
$endlist
$component C31
SM*
C?
C1-1
$endlist
$component C34
SM*
C?
C1-1
$endlist
$component C33
SM*
C?
C1-1
$endlist
$component C28
SM*
C?
C1-1
$endlist
$component C27
SM*
C?
C1-1
$endlist
$component C30
SM*
C?
C1-1
$endlist
$component C29
SM*
C?
C1-1
$endlist
$component C24
SM*
C?
C1-1
$endlist
$component C23
SM*
C?
C1-1
$endlist
$component C26
SM*
C?
C1-1
$endlist
$component C25
SM*
C?
C1-1
$endlist
$component R14
R?
SM0603
SM0805
$endlist
$component R13
R?
SM0603
SM0805
$endlist
$component R12
R?
SM0603
SM0805
$endlist
$component R11
R?
SM0603
SM0805
$endlist
$component R10
R?
SM0603
SM0805
$endlist
$endfootprintlist
}
{ Pin List by Nets
/FPGA/Net 2 "DIG21"
U3 34
J19 23
/FPGA/Net 3 "2V5"
C32 1
C31 1
C34 1
C33 1
U3 21
U3 46
U3 74
U3 96
C54 1
UF1 5
/FPGA/Net 4 "1V2"
C28 1
C27 1
C30 1
C29 1
U3 80
U3 56
U3 28
U3 6
C53 1
U8 4
U8 2
/FPGA/Net 5 "3V3"
U11 95
U11 93
U11 83
L6 1
L3 1
L2 1
L1 1
C15 1
R4 1
R2 2
R1 2
U1 4
Y1 4
Y1 1
C22 1
C24 1
C23 1
C26 1
C25 1
U3 99
U3 43
U3 39
U3 8
U3 20
U3 31
U3 45
U3 55
U3 73
U3 82
U3 97
L7 1
J19 29
J19 27
J19 30
J19 28
C52 1
UF1 3
UF1 1
U7 4
U7 2
U9 20
U9 14
U9 11
U9 12
R27 1
R26 1
J22 4
J23 4
C57 1
D2 1
R24 1
U10 19
U10 20
U10 14
/POWER_SUPPLY/Net 6 "1.8v"
L5 1
L4 1
C49 1
U6 4
U6 2
/CONNECTORS/Net 7 "ANALOG6"
J19 31
U9 7
/CONNECTORS/Net 8 "ANALOG4"
J19 33
U9 5
/CONNECTORS/Net 9 "ANALOG2"
J19 35
U9 3
/CONNECTORS/Net 10 "ANALOG0"
J19 37
U9 1
/FPGA/Net 11 "DIG23"
U3 32
J19 25
/FPGA/Net 12 "DIG19"
U3 36
J19 21
/FPGA/Net 13 "DIG17"
U3 41
J19 19
/FPGA/Net 14 "DIG15"
U3 48
J19 17
/FPGA/Net 15 "DIG13"
U3 71
J19 2
/FPGA/Net 16 "DIG11"
U3 68
J19 4
/FPGA/Net 17 "DIG9"
U3 66
J19 6
/FPGA/Net 18 "DIG7"
U3 63
J19 8
/FPGA/Net 19 "DIG5"
U3 61
J19 10
/FPGA/Net 20 "DIG3"
U3 58
J19 12
/FPGA/Net 21 "DIG0"
U3 53
J19 15
/CONNECTORS/Net 22 "R-HPO"
U11 88
J18 3
/CONNECTORS/Net 23 "MICIN"
U11 99
J18 8
/CONNECTORS/Net 24 "ADIN1"
U11 68
J18 1
/Net 25 "DP0"
U11 79
J21 3
/UART_USB_I2C/Net 26 "RXD"
U11 57
U10 10
/FPGA/Net 27 "ADC_SDOUT"
U3 23
U9 16
/FPGA/Net 28 "ADC_SCLK"
U3 18
U9 18
/FPGA/Net 29 "ADC_CS"
U3 24
U9 15
/LCD/Net 30 "LCD_HSYNC"
U11 109
J17 19
/LCD/Net 31 "LCD_CLK"
U11 2
L8 1
/Net 32 "LCD_D1"
U11 128
RP2 3
/Net 33 "LCD_D3"
U11 126
RP2 1
/Net 34 "LCD_D6"
U11 122
RP1 2
/Net 35 "LCD_D7"
U11 121
RP1 1
/MEMORY/Net 36 "NF_ALE"
U11 49
U5 17
/FPGA/Net 37 "CS2_N"
U11 55
U3 69
U5 10
/MEMORY/Net 38 "FRB_N"
U11 53
R23 2
U5 7
U5 6
/MEMORY/Net 39 "SD_CD_N"
U11 54
R21 2
J16 CD
/MEMORY/Net 40 "MSC_CLK"
U11 62
R16 2
/MEMORY/Net 41 "3.3V"
R21 1
C35 2
R17 1
R20 1
R22 1
R18 1
R19 1
J16 4
C45 1
C44 1
C43 1
R23 1
U5 37
U5 19
U5 12
C40 2
U4 1
/FPGA/Net 42 "RDWR_N"
U11 13
U3 86
U4 16
/MEMORY/Net 43 "CAS_N"
U11 12
U4 17
/FPGA/Net 44 "WE0_N"
U11 14
U3 88
U4 15
/MEMORY/Net 45 "CKE"
U11 17
U4 37
/FPGA/Net 47 "TDO_F"
U11 59
R13 1
R27 2
J23 1
/FPGA/Net 48 "WE1_N"
U11 15
R11 1
U3 89
U4 39
/Net 49 "A3"
U11 5
U3 78
/Net 50 "A1"
U11 7
U3 83
/Net 51 "A10"
U11 9
U3 85
/Net 52 "A12"
U11 18
U3 90
/Net 53 "A9"
U11 22
U3 92
/Net 54 "A7"
U11 26
U3 95
/FPGA/Net 55 "OSC_XM"
Y1 3
U3 38
/Net 56 "D1"
U11 41
U3 15
/Net 57 "D3"
U11 43
U3 11
/Net 58 "D5"
U11 45
U3 9
/Net 59 "D7"
U11 47
U3 4
/Net 60 "A4"
U11 29
U3 2
/Net 61 "UBOOT"
U11 100
J15 1
R1 1
Net 62 ""
U11 73
U11 71
C8 1
C6 1
C4 1
L4 2
Net 63 ""
U11 91
U11 87
L3 2
C3 1
Net 64 ""
U11 77
L2 2
C2 1
Net 65 ""
U11 70
L1 2
C1 1
/Net 66 "VDDA"
U11 75
C7 1
/LCD/Net 67 "LCD_SCL"
U11 105
J17 21
/Net 68 "RCLK0"
U11 82
R6 2
Net 69 ""
C18 2
X1 1
R6 1
R8 1
Net 70 ""
C20 2
X2 1
R7 1
R9 1
Net 73 ""
SW1 1
U1 3
/Net 74 "RCLK"
U11 81
C19 2
X1 2
R8 2
Net 76 ""
U11 101
R2 1
/Net 77 "VREF"
U11 94
C5 1
/Net 78 "RREF"
U11 76
R3 1
/Net 79 "VDDIO"
U11 66
U11 104
U11 24
C14 1
C13 1
C12 1
C11 1
L6 2
Net 80 ""
U11 4
U11 21
C10 1
C9 1
L5 2
/Net 81 "A5"
U11 28
U3 3
/Net 82 "D6"
U11 46
U3 5
/Net 83 "D4"
U11 44
U3 10
/Net 84 "D2"
U11 42
U3 12
/Net 85 "D0"
U11 40
U3 16
/Net 86 "A6"
U11 27
U3 98
/Net 87 "A8"
U11 23
U3 94
/Net 88 "A11"
U11 19
U3 91
/Net 89 "A0"
U11 8
U3 84
/Net 90 "A2"
U11 6
U3 79
/FPGA/Net 91 "TCK_F"
U11 48
R12 1
/FPGA/Net 92 "TMS_F"
U11 60
R14 1
R26 2
J23 2
/MEMORY/Net 94 "CK0"
U11 16
R15 2
/MEMORY/Net 95 "RAS_N"
U11 11
U4 18
/MEMORY/Net 96 "DCS0_N"
U11 10
U4 19
/MEMORY/Net 97 "MSC_D0"
U11 61
R17 2
J16 7
/MEMORY/Net 98 "MSC_CMD"
U11 63
R18 2
J16 3
/MEMORY/Net 99 "FRE_N"
U11 52
U5 8
/MEMORY/Net 100 "CS1_N"
U11 56
U5 9
/MEMORY/Net 101 "NF_CLE"
U11 50
U5 16
/MEMORY/Net 102 "FWE_N"
U11 51
U5 18
/Net 103 "LCD_D5"
U11 123
RP1 3
/Net 104 "LCD_D4"
U11 124
RP1 4
/Net 105 "LCD_D2"
U11 127
RP2 2
/Net 106 "LCD_D0"
U11 1
RP2 4
/LCD/Net 107 "LCD_VSYNC"
U11 108
J17 18
/LCD/Net 108 "LCD_DE"
U11 110
J17 20
/LCD/Net 109 "LCD_SDA"
U11 107
J17 22
/FPGA/Net 110 "ADC_EOC"
U3 17
U9 19
/FPGA/Net 111 "ADC_CSTART"
U3 26
U9 9
/FPGA/Net 112 "ADC_SDIN"
U3 22
U9 17
/UART_USB_I2C/Net 113 "TXD"
U11 58
R24 2
R25 2
U10 12
U10 13
/Net 114 "DM0"
U11 78
J21 2
/CONNECTORS/Net 115 "R-LINEIN"
U11 98
J18 6
/CONNECTORS/Net 116 "L-HPO"
U11 90
J18 4
/CONNECTORS/Net 117 "ADIN0"
U11 67
J18 1
/CONNECTORS/Net 118 "L-LINEIN"
U11 97
J18 5
/FPGA/Net 119 "DIG1"
U3 54
J19 14
/FPGA/Net 120 "DIG2"
U3 57
J19 13
/FPGA/Net 121 "DIG4"
U3 60
J19 11
/FPGA/Net 122 "DIG6"
U3 62
J19 9
/FPGA/Net 123 "DIG8"
U3 65
J19 7
/FPGA/Net 124 "DIG10"
U3 67
J19 5
/FPGA/Net 125 "DIG12"
U3 70
J19 3
/FPGA/Net 126 "DIG14"
U3 49
J19 16
/FPGA/Net 127 "DIG16"
U3 47
J19 18
/FPGA/Net 128 "DIG18"
U3 40
J19 20
/FPGA/Net 129 "DIG20"
U3 35
J19 22
/FPGA/Net 130 "DIG22"
U3 33
J19 24
/CONNECTORS/Net 131 "ANALOG1"
J19 38
U9 2
/CONNECTORS/Net 132 "ANALOG3"
J19 36
U9 4
/CONNECTORS/Net 133 "ANALOG5"
J19 34
U9 6
/CONNECTORS/Net 134 "ANALOG7"
J19 32
U9 8
/CONNECTORS/Net 135 "AN_GND"
J19 39
J19 40
L9 1
U9 13
U9 10
Net 137 "GND"
U11 96
U11 92
U11 89
U11 80
U11 74
U11 72
U11 69
U11 125
U11 106
U11 3
U11 20
U11 25
J15 2
C14 2
C13 2
C12 2
C11 2
C10 2
C9 2
C8 2
C6 2
C4 2
C3 2
C2 2
C1 2
C15 2
C16 2
R5 2
C17 2
R3 2
C7 2
C5 2
SW1 2
U1 1
C19 1
C18 1
C21 1
C20 1
Y1 2
C22 2
C32 2
C31 2
C34 2
C33 2
C28 2
C27 2
C30 2
C29 2
C24 2
C23 2
C26 2
C25 2
R10 2
U3 42
U3 50
U3 7
U3 14
U3 19
U3 29
U3 37
U3 52
U3 59
U3 64
U3 72
U3 81
U3 87
U3 93
C35 1
J16 CASE
J16 CASE
J16 CASE
J16 6
J16 COM
C45 2
C44 2
C43 2
U5 36
U5 13
C36 1
C37 1
C38 1
C40 1
C39 1
C41 1
C42 1
U4 46
U4 52
U4 12
U4 6
U4 54
U4 41
U4 28
J17 24
J17 23
J17 8
J17 3
J17 2
J17 1
C46 2
C47 2
J18 7
J19 1
J19 26
C54 2
C53 2
C52 2
C49 2
C48 2
C50 2
C51 2
J20 1
U6 1
UF1 2
U8 1
U7 1
L9 2
C60 2
L11 2
J22 3
J23 3
C57 2
C58 1
C59 1
U10 18
U10 1
/Net 139 "RESET_N"
U11 84
R4 2
C16 1
R5 1
C17 1
U1 2
/Net 140 "EXTAL"
U11 64
C21 2
X2 2
R9 2
/Net 141 "XTAL"
U11 65
R7 2
Net 165 ""
R14 2
U3 75
Net 166 ""
R12 2
U3 77
Net 167 ""
D1 1
U3 44
Net 168 ""
R10 1
D1 2
Net 169 ""
R11 2
U3 100
Net 170 ""
R13 2
U3 76
Net 176 ""
R16 1
J16 5
Net 177 ""
R22 2
J16 1
Net 178 ""
C37 2
U4 49
Net 179 ""
C39 2
U4 3
Net 180 ""
C41 2
U4 27
Net 181 ""
C42 2
U4 14
Net 182 ""
C38 2
U4 9
Net 183 ""
C36 2
U4 43
Net 184 ""
R15 1
U4 38
Net 185 ""
R20 2
J16 2
Net 186 ""
R19 2
J16 8
Net 215 ""
J17 16
RP2 5
Net 216 ""
J17 14
RP2 7
Net 217 ""
J17 12
RP1 5
Net 218 ""
J17 11
RP1 6
Net 219 ""
J17 10
RP1 7
Net 220 ""
J17 9
RP1 8
Net 221 ""
J17 13
RP2 8
Net 222 ""
J17 15
RP2 6
Net 223 ""
J17 7
J17 6
J17 5
J17 4
L7 2
C46 1
C47 1
Net 224 ""
J17 17
L8 2
/POWER_SUPPLY/Net 225 "BAT_V"
C48 1
C50 1
C51 1
J20 2
U6 3
U8 3
U7 3
Net 227 ""
L10 1
J21 1
/UART_USB_I2C/Net 228 "RX1"
J22 2
U10 9
Net 229 ""
C59 2
U10 7
Net 230 ""
D2 2
R25 1
Net 231 ""
C56 2
U10 6
Net 232 ""
C55 2
U10 4
Net 233 ""
C55 1
U10 2
Net 234 ""
C56 1
U10 5
Net 235 ""
C58 2
U10 3
/UART_USB_I2C/Net 236 "TX1"
J22 1
U10 8
Net 237 ""
L11 1
J21 5
J21 4
Net 238 ""
J24 1
L10 2
Net 239 ""
C60 1
J21 9
J21 8
J21 7
J21 6
/MEMORY/Net 259 "D0"
U5 29
U4 2
/MEMORY/Net 260 "D1"
U5 30
U4 4
/MEMORY/Net 261 "D2"
U5 31
U4 5
/MEMORY/Net 262 "D3"
U5 32
U4 7
/MEMORY/Net 263 "D4"
U5 41
U4 8
/MEMORY/Net 264 "D5"
U5 42
U4 10
/MEMORY/Net 265 "D6"
U5 43
U4 11
/MEMORY/Net 266 "D7"
U5 44
U4 13
}
#End
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