mirror of
git://projects.qi-hardware.com/nn-usb-fpga.git
synced 2025-01-10 01:20:16 +02:00
a7c692d3f0
Adding FPGA sram hdl code and user space code Fixing some errors: LCD's pinout connector is swapped FPGA TDI SIGNAL must be routed to another pin (C14), right now is DQMH Remove R11 Check JZ4725 symbol's component (PORTD is wrong) Adding PB2 and PB3 wiring ADC's vref to external connector Adding power LED Adding CPU Led
75 lines
1.9 KiB
Makefile
75 lines
1.9 KiB
Makefile
DESIGN = sram_bus
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PINS = sram_bus.ucf
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DEVICE = xc3s250e-VQ100-4
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BGFLAGS = -g TdoPin:PULLNONE -g DonePin:PULLUP \
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-g CRC:enable -g StartUpClk:CCLK
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SIM_CMD = /opt/cad/modeltech/bin/vsim
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SIM_COMP_SCRIPT = simulation/$(DESIGN)_TB.do
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#SIM_INIT_SCRIPT = simulation/$(DESIGN)_init.do
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SIMGEN_OPTIONS = -p $(FPGA_ARCH) -lang $(LANGUAGE)
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SAKC_IP = 192.168.254.101
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SRC = sram_bus.v
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all: bits
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remake: clean-build all
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clean:
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rm -f *~ */*~ a.out *.log *.key *.edf *.ps trace.dat
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rm *.bit
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clean-build: clean
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rm -rf build
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cleanall: clean
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rm -rf build $(DESIGN).bit
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bits: $(DESIGN).bit
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#
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# Synthesis
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#
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build/project.src:
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@[ -d build ] || mkdir build
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@rm -f $@
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for i in $(SRC); do echo verilog work ../$$i >> $@; done
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for i in $(SRC_HDL); do echo VHDL work ../$$i >> $@; done
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build/project.xst: build/project.src
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echo "run" > $@
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echo "-top $(DESIGN) " >> $@
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echo "-p $(DEVICE)" >> $@
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echo "-opt_mode Area" >> $@
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echo "-opt_level 1" >> $@
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echo "-ifn project.src" >> $@
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echo "-ifmt mixed" >> $@
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echo "-ofn project.ngc" >> $@
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echo "-ofmt NGC" >> $@
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echo "-rtlview yes" >> $@
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build/project.ngc: build/project.xst $(SRC)
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cd build && xst -ifn project.xst -ofn project.log
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build/project.ngd: build/project.ngc $(PINS)
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cd build && ngdbuild -p $(DEVICE) project.ngc -uc ../$(PINS)
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build/project.ncd: build/project.ngd
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cd build && map -pr b -p $(DEVICE) project
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build/project_r.ncd: build/project.ncd
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cd build && par -w project project_r.ncd
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build/project_r.twr: build/project_r.ncd
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cd build && trce -v 25 project_r.ncd project.pcf
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$(DESIGN).bit: build/project_r.ncd build/project_r.twr
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cd build && bitgen project_r.ncd -l -w $(BGFLAGS)
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@mv -f build/project_r.bit $@
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sim:
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cd simulation; $(SIM_CMD) -do $(DESIGN)_TB.do
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upload: $(DESIGN).bit
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scp $(DESIGN).bit root@$(SAKC_IP):
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