mirror of
git://projects.qi-hardware.com/nn-usb-fpga.git
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167 lines
4.4 KiB
ArmAsm
167 lines
4.4 KiB
ArmAsm
/*
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* LatticeMico32 C startup code.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* Exception handlers - Must be 32 bytes long. */
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.section .text, "ax", @progbits
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.global _start
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.global irq_enable, irq_disable, irq_mask, jump, halt
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_start:
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_reset_handler:
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xor r0, r0, r0
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wcsr IE, r0
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mvhi r1, hi(_reset_handler)
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ori r1, r1, lo(_reset_handler)
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wcsr EBA, r1
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calli _crt0
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nop
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nop
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_crt0:
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/* Setup stack and global pointer */
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mvhi sp, hi(_fstack)
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ori sp, sp, lo(_fstack)
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mvhi gp, hi(_gp)
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ori gp, gp, lo(_gp)
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/* Clear BSS */
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mvhi r1, hi(_fbss)
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ori r1, r1, lo(_fbss)
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mvhi r3, hi(_ebss)
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ori r3, r3, lo(_ebss)
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.clearBSS:
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be r1, r3, .callMain
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sw (r1+0), r0
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addi r1, r1, 4
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bi .clearBSS
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.callMain:
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mvi r1, 0
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mvi r2, 0
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mvi r3, 0
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calli main
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irq_enable:
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mvi r1, 1
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wcsr IE, r1
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ret
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irq_mask:
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mvi r1, 0x0000000f
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wcsr IM, r1
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ret
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irq_disable:
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mvi r1, 0
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wcsr IE, r1
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ret
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jump:
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b r1
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halt:
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bi halt
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/* Save all registers onto the stack */
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_save_all:
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addi sp, sp, -128
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sw (sp+4), r1
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sw (sp+8), r2
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sw (sp+12), r3
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sw (sp+16), r4
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sw (sp+20), r5
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sw (sp+24), r6
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sw (sp+28), r7
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sw (sp+32), r8
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sw (sp+36), r9
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sw (sp+40), r10
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#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE
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sw (sp+44), r11
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sw (sp+48), r12
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sw (sp+52), r13
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sw (sp+56), r14
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sw (sp+60), r15
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sw (sp+64), r16
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sw (sp+68), r17
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sw (sp+72), r18
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sw (sp+76), r19
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sw (sp+80), r20
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sw (sp+84), r21
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sw (sp+88), r22
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sw (sp+92), r23
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sw (sp+96), r24
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sw (sp+100), r25
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sw (sp+104), r26
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sw (sp+108), r27
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#endif
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sw (sp+120), ea
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sw (sp+124), ba
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/* ra and sp need special handling, as they have been modified */
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lw r1, (sp+128)
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sw (sp+116), r1
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mv r1, sp
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addi r1, r1, 128
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sw (sp+112), r1
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ret
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/* Restore all registers and return from exception */
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_restore_all_and_return:
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lw r1, (sp+4)
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lw r2, (sp+8)
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lw r3, (sp+12)
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lw r4, (sp+16)
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lw r5, (sp+20)
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lw r6, (sp+24)
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lw r7, (sp+28)
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lw r8, (sp+32)
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lw r9, (sp+36)
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lw r10, (sp+40)
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#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE
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lw r11, (sp+44)
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lw r12, (sp+48)
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lw r13, (sp+52)
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lw r14, (sp+56)
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lw r15, (sp+60)
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lw r16, (sp+64)
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lw r17, (sp+68)
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lw r18, (sp+72)
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lw r19, (sp+76)
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lw r20, (sp+80)
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lw r21, (sp+84)
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lw r22, (sp+88)
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lw r23, (sp+92)
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lw r24, (sp+96)
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lw r25, (sp+100)
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lw r26, (sp+104)
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lw r27, (sp+108)
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#endif
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lw ra, (sp+116)
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lw ea, (sp+120)
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lw ba, (sp+124)
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/* Stack pointer must be restored last, in case it has been updated */
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lw sp, (sp+112)
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eret
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