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33 lines
1.6 KiB
Verilog
33 lines
1.6 KiB
Verilog
`ifndef LM32_ALL_FILES
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`define LM32_ALL_FILES
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//`ifndef SIMULATION
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//`include "pmi_def.v"
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//`endif
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// JTAG Debug related files
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`include "../components/lm32_top/rtl/verilog/er1.v"
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`include "../components/lm32_top/rtl/verilog/typeb.v"
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`include "../components/lm32_top/rtl/verilog/typea.v"
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`include "../components/lm32_top/rtl/verilog/jtag_cores.v"
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`include "../components/lm32_top/rtl/verilog/jtag_lm32.v"
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// CPU Core related files
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`include "../components/lm32_top/rtl/verilog/lm32_addsub.v"
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`include "../components/lm32_top/rtl/verilog/lm32_adder.v"
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`include "../components/lm32_top/rtl/verilog/lm32_cpu.v"
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`include "../components/lm32_top/rtl/verilog/lm32_dcache.v"
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`include "../components/lm32_top/rtl/verilog/lm32_debug.v"
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`include "../components/lm32_top/rtl/verilog/lm32_decoder.v"
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`include "../components/lm32_top/rtl/verilog/lm32_icache.v"
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`include "../components/lm32_top/rtl/verilog/lm32_instruction_unit.v"
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`include "../components/lm32_top/rtl/verilog/lm32_interrupt.v"
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`include "../components/lm32_top/rtl/verilog/lm32_load_store_unit.v"
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`include "../components/lm32_top/rtl/verilog/lm32_logic_op.v"
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`include "../components/lm32_top/rtl/verilog/lm32_mc_arithmetic.v"
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`include "../components/lm32_top/rtl/verilog/lm32_multiplier.v"
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`include "../components/lm32_top/rtl/verilog/lm32_shifter.v"
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`include "../components/lm32_top/rtl/verilog/lm32_top.v"
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`include "../components/lm32_top/rtl/verilog/lm32_monitor.v"
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`include "../components/lm32_top/rtl/verilog/lm32_monitor_ram.v"
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`include "../components/lm32_top/rtl/verilog/lm32_ram.v"
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`include "../components/lm32_top/rtl/verilog/lm32_jtag.v"
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`endif // LM32_ALL_FILES
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