2008-07-21 20:08:14 +03:00
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/*
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* Atheros AR71xx SoC specific platform definitions
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*
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* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef __ASM_MACH_AR71XX_PLATFORM_H
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#define __ASM_MACH_AR71XX_PLATFORM_H
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2008-07-22 19:35:29 +03:00
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#include <linux/if_ether.h>
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2008-07-21 20:08:14 +03:00
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#include <linux/skbuff.h>
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#include <linux/phy.h>
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#include <linux/spi/spi.h>
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struct ag71xx_platform_data {
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u32 reset_bit;
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u32 flush_reg;
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u32 phy_mask;
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phy_interface_t phy_if_mode;
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u32 mii_if;
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2008-07-22 19:35:29 +03:00
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u8 mac_addr[ETH_ALEN];
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2008-07-21 20:08:14 +03:00
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};
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struct ar71xx_spi_platform_data {
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unsigned bus_num;
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unsigned num_chipselect;
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u32 (*get_ioc_base)(u8 chip_select, int cs_high, int is_on);
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};
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#define AR71XX_SPI_CS_INACTIVE 0
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#define AR71XX_SPI_CS_ACTIVE 1
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extern void ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
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struct spi_board_info const *info,
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unsigned n) __init;
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2008-07-22 19:35:29 +03:00
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extern void ar71xx_set_mac_base(char *mac_str) __init;
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2008-07-21 20:08:14 +03:00
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extern void ar71xx_add_device_eth(unsigned int id, phy_interface_t phy_if_mode,
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u32 phy_mask) __init;
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#endif /* __ASM_MACH_AR71XX_PLATFORM_H */
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