mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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100 lines
1.9 KiB
C
100 lines
1.9 KiB
C
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/*
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* Ralink RT288X clock API
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*
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <asm/mach-ralink/common.h>
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#include <asm/mach-ralink/rt288x.h>
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#include <asm/mach-ralink/rt288x_regs.h>
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#include "common.h"
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struct clk {
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unsigned long rate;
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};
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static struct clk rt288x_cpu_clk;
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static struct clk rt288x_sys_clk;
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static struct clk rt288x_wdt_clk;
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static struct clk rt288x_uart_clk;
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void __init rt288x_clocks_init(void)
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{
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u32 t;
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t = rt288x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
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t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
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switch (t) {
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case SYSTEM_CONFIG_CPUCLK_250:
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rt288x_cpu_clk.rate = 250000000;
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break;
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case SYSTEM_CONFIG_CPUCLK_266:
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rt288x_cpu_clk.rate = 266666667;
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break;
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case SYSTEM_CONFIG_CPUCLK_280:
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rt288x_cpu_clk.rate = 280000000;
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break;
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case SYSTEM_CONFIG_CPUCLK_300:
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rt288x_cpu_clk.rate = 300000000;
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break;
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}
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rt288x_sys_clk.rate = rt288x_cpu_clk.rate / 2;
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rt288x_uart_clk.rate = rt288x_sys_clk.rate;
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rt288x_wdt_clk.rate = rt288x_sys_clk.rate;
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}
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/*
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* Linux clock API
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*/
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struct clk *clk_get(struct device *dev, const char *id)
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{
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if (!strcmp(id, "sys"))
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return &rt288x_sys_clk;
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if (!strcmp(id, "cpu"))
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return &rt288x_cpu_clk;
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if (!strcmp(id, "wdt"))
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return &rt288x_wdt_clk;
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if (!strcmp(id, "uart"))
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return &rt288x_uart_clk;
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL(clk_get);
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int clk_enable(struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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