mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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192 lines
6.8 KiB
C
192 lines
6.8 KiB
C
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/*
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*
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* Copyright (c) 2007 Atheros Communications Inc.
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* All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation;
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*
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* Software distributed under the License is distributed on an "AS
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* IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
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* implied. See the License for the specific language governing
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* rights and limitations under the License.
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*
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*
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*
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*/
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#ifndef AR6K_H_
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#define AR6K_H_
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#define AR6K_MAILBOXES 4
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/* HTC runs over mailbox 0 */
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#define HTC_MAILBOX 0
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#define AR6K_TARGET_DEBUG_INTR_MASK 0x01
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#define OTHER_INTS_ENABLED (INT_STATUS_ENABLE_ERROR_MASK | \
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INT_STATUS_ENABLE_CPU_MASK | \
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INT_STATUS_ENABLE_COUNTER_MASK)
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//#define MBOXHW_UNIT_TEST 1
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#include "athstartpack.h"
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typedef PREPACK struct _AR6K_IRQ_PROC_REGISTERS {
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A_UINT8 host_int_status;
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A_UINT8 cpu_int_status;
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A_UINT8 error_int_status;
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A_UINT8 counter_int_status;
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A_UINT8 mbox_frame;
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A_UINT8 rx_lookahead_valid;
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A_UINT8 hole[2];
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A_UINT32 rx_lookahead[2];
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} POSTPACK AR6K_IRQ_PROC_REGISTERS;
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#define AR6K_IRQ_PROC_REGS_SIZE sizeof(AR6K_IRQ_PROC_REGISTERS)
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typedef PREPACK struct _AR6K_IRQ_ENABLE_REGISTERS {
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A_UINT8 int_status_enable;
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A_UINT8 cpu_int_status_enable;
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A_UINT8 error_status_enable;
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A_UINT8 counter_int_status_enable;
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} POSTPACK AR6K_IRQ_ENABLE_REGISTERS;
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#include "athendpack.h"
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#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(AR6K_IRQ_ENABLE_REGISTERS)
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#define AR6K_REG_IO_BUFFER_SIZE 32
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#define AR6K_MAX_REG_IO_BUFFERS 8
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/* buffers for ASYNC I/O */
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typedef struct AR6K_ASYNC_REG_IO_BUFFER {
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HTC_PACKET HtcPacket; /* we use an HTC packet as a wrapper for our async register-based I/O */
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A_UINT8 Buffer[AR6K_REG_IO_BUFFER_SIZE];
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} AR6K_ASYNC_REG_IO_BUFFER;
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typedef struct _AR6K_DEVICE {
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A_MUTEX_T Lock;
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AR6K_IRQ_PROC_REGISTERS IrqProcRegisters;
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AR6K_IRQ_ENABLE_REGISTERS IrqEnableRegisters;
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void *HIFDevice;
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A_UINT32 BlockSize;
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A_UINT32 BlockMask;
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A_UINT32 MailboxAddress;
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HIF_PENDING_EVENTS_FUNC GetPendingEventsFunc;
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void *HTCContext;
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HTC_PACKET_QUEUE RegisterIOList;
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AR6K_ASYNC_REG_IO_BUFFER RegIOBuffers[AR6K_MAX_REG_IO_BUFFERS];
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void (*TargetFailureCallback)(void *Context);
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A_STATUS (*MessagePendingCallback)(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc);
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HIF_DEVICE_IRQ_PROCESSING_MODE HifIRQProcessingMode;
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HIF_MASK_UNMASK_RECV_EVENT HifMaskUmaskRecvEvent;
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} AR6K_DEVICE;
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#define IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(pDev) ((pDev)->HifIRQProcessingMode != HIF_DEVICE_IRQ_SYNC_ONLY)
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A_STATUS DevSetup(AR6K_DEVICE *pDev);
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A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev);
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A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev);
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A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev,
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A_UINT32 *pLookAhead,
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int TimeoutMS);
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A_STATUS DevRWCompletionHandler(void *context, A_STATUS status);
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A_STATUS DevDsrHandler(void *context);
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A_STATUS DevCheckPendingRecvMsgsAsync(void *context);
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void DevDumpRegisters(AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs,
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AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs);
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#define DEV_STOP_RECV_ASYNC TRUE
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#define DEV_STOP_RECV_SYNC FALSE
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#define DEV_ENABLE_RECV_ASYNC TRUE
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#define DEV_ENABLE_RECV_SYNC FALSE
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A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
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A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
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static INLINE A_STATUS DevSendPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 SendLength) {
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A_UINT32 paddedLength;
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A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
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A_STATUS status;
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/* adjust the length to be a multiple of block size if appropriate */
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paddedLength = (SendLength + (pDev->BlockMask)) &
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(~(pDev->BlockMask));
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#if 0 // BufferLength may not be set in , fix this...
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if (paddedLength > pPacket->BufferLength) {
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AR_DEBUG_ASSERT(FALSE);
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if (pPacket->Completion != NULL) {
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COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
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}
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return A_EINVAL;
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}
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#endif
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AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
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("DevSendPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
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paddedLength,
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pDev->MailboxAddress,
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sync ? "SYNC" : "ASYNC"));
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status = HIFReadWrite(pDev->HIFDevice,
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pDev->MailboxAddress,
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pPacket->pBuffer,
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paddedLength, /* the padded length */
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sync ? HIF_WR_SYNC_BLOCK_INC : HIF_WR_ASYNC_BLOCK_INC,
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sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
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if (sync) {
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pPacket->Status = status;
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}
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return status;
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}
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static INLINE A_STATUS DevRecvPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 RecvLength) {
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A_UINT32 paddedLength;
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A_STATUS status;
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A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
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/* adjust the length to be a multiple of block size if appropriate */
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paddedLength = (RecvLength + (pDev->BlockMask)) &
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(~(pDev->BlockMask));
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if (paddedLength > pPacket->BufferLength) {
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AR_DEBUG_ASSERT(FALSE);
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AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
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("DevRecvPacket, Not enough space for padlen:%d recvlen:%d bufferlen:%d \n",
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paddedLength,RecvLength,pPacket->BufferLength));
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if (pPacket->Completion != NULL) {
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COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
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}
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return A_EINVAL;
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}
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AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
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("DevRecvPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
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paddedLength,
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pDev->MailboxAddress,
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sync ? "SYNC" : "ASYNC"));
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status = HIFReadWrite(pDev->HIFDevice,
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pDev->MailboxAddress,
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pPacket->pBuffer,
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paddedLength,
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sync ? HIF_RD_SYNC_BLOCK_INC : HIF_RD_ASYNC_BLOCK_INC,
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sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
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if (sync) {
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pPacket->Status = status;
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}
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return status;
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}
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#ifdef MBOXHW_UNIT_TEST
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A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev);
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#endif
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#endif /*AR6K_H_*/
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