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44 lines
1.5 KiB
C
44 lines
1.5 KiB
C
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#ifndef _IFXMIPS_COMPAT_H__
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#define _IFXMIPS_COMPAT_H__
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#define IFX_SUCCESS 0
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#define IFX_ERROR (-1)
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#define ATM_VBR_NRT ATM_VBR
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#define ATM_VBR_RT 6
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#define ATM_UBR_PLUS 7
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#define ATM_GFR 8
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#define NUM_ENTITY(x) (sizeof(x) / sizeof(*(x)))
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#define SET_BITS(x, msb, lsb, value) \
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(((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
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#define IFX_PMU_ENABLE 1
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#define IFX_PMU_DISABLE 0
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#define IFX_PMU_MODULE_DSL_DFE (1 << 9)
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#define IFX_PMU_MODULE_AHBS (1 << 13)
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#define IFX_PMU_MODULE_PPE_QSB (1 << 18)
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#define IFX_PMU_MODULE_PPE_SLL01 (1 << 19)
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#define IFX_PMU_MODULE_PPE_TC (1 << 21)
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#define IFX_PMU_MODULE_PPE_EMA (1 << 22)
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#define IFX_PMU_MODULE_PPE_TOP (1 << 29)
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#define ifx_pmu_set(a,b) {if(a == IFX_PMU_ENABLE) lq_pmu_enable(b); else lq_pmu_disable(b);}
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#define PPE_TOP_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))
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#define PPE_SLL01_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_SLL01, (__x))
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#define PPE_TC_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TC, (__x))
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#define PPE_EMA_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_EMA, (__x))
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#define PPE_QSB_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_QSB, (__x))
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#define PPE_TPE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_AHBS, (__x))
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#define DSL_DFE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_DSL_DFE, (__x))
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#define IFX_REG_W32(_v, _r) __raw_writel((_v), (_r))
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#define CONFIG_IFXMIPS_DSL_CPE_MEI y
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#endif
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