2010-04-25 12:50:33 +03:00
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--- a/arch/mips/kernel/traps.c
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+++ b/arch/mips/kernel/traps.c
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@@ -1537,7 +1537,16 @@ void __cpuinit per_cpu_trap_init(void)
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2010-04-25 00:35:49 +03:00
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*/
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if (cpu_has_mips_r2) {
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cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
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+ if (!cp0_compare_irq)
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+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
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+
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cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
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+ if (!cp0_perfcount_irq)
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+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
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+
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+ if (arch_fixup_c0_irqs)
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+ arch_fixup_c0_irqs();
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+
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if (cp0_perfcount_irq == cp0_compare_irq)
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cp0_perfcount_irq = -1;
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} else {
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2010-04-25 12:50:33 +03:00
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--- a/arch/mips/include/asm/irq.h
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+++ b/arch/mips/include/asm/irq.h
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@@ -158,8 +158,10 @@ extern void free_irqno(unsigned int irq)
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2010-04-25 00:35:49 +03:00
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* IE7. Since R2 their number has to be read from the c0_intctl register.
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*/
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#define CP0_LEGACY_COMPARE_IRQ 7
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+#define CP0_LEGACY_PERFCNT_IRQ 7
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extern int cp0_compare_irq;
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extern int cp0_perfcount_irq;
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+extern void __weak arch_fixup_c0_irqs(void);
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#endif /* _ASM_IRQ_H */
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