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110 lines
3.4 KiB
Diff
110 lines
3.4 KiB
Diff
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From 96f9902ff40b2124fbe34eeac727c596e7701702 Mon Sep 17 00:00:00 2001
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From: Andy Green <andy@openmoko.com>
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Date: Fri, 25 Jul 2008 23:06:20 +0100
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Subject: [PATCH] add-limit-sdcard-clk-cmdline.patch
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This patch allows you to control the maximum clock rate that will
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be selected for SD Card access, from the kernel commandline using
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glamo_mci.sd_max_clk=10000000
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and also from
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echo 10000000 > /sys/module/glamo_mci/parameters/sd_max_clk
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although you have to suspend and resume to make the limit operational
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on the actual SD_CLK line.
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Clocks that are possible are divided down from ~50MHz, so 25000000,
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16666666, 12500000, 10000000, etc. With Freerunner A5 revision that
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has 100R series resistors in SD Card signals, I didn't get reliable
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operation above 16MHz. With A6 revision the series resistors went
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down to 75R, maybe it can work at 25MHz.
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Reducing the clock rate is something to try if you find that your
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SD Card is not communicating properly with the default speed.
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Signed-off-by: Andy Green <andy@openmoko.com>
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---
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drivers/mfd/glamo/glamo-mci.c | 38 +++++++++++++++++++++++++++++---------
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1 files changed, 29 insertions(+), 9 deletions(-)
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diff --git a/drivers/mfd/glamo/glamo-mci.c b/drivers/mfd/glamo/glamo-mci.c
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index b53827e..67bb815 100644
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--- a/drivers/mfd/glamo/glamo-mci.c
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+++ b/drivers/mfd/glamo/glamo-mci.c
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@@ -40,6 +40,24 @@ static spinlock_t clock_lock;
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static void glamo_mci_send_request(struct mmc_host *mmc);
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+/*
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+ * Max SD clock rate
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+ *
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+ * held at /(3 + 1) due to concerns of 100R recommended series resistor
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+ * allows 16MHz @ 4-bit --> 8MBytes/sec raw
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+ *
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+ * you can override this on kernel commandline using
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+ *
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+ * glamo_mci.sd_max_clk=10000000
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+ *
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+ * for example
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+ */
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+
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+static int sd_max_clk = 50000000 / 3;
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+module_param(sd_max_clk, int, 0644);
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+
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+
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+
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unsigned char CRC7(u8 * pu8, int cnt)
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{
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u8 crc = 0;
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@@ -676,9 +694,9 @@ static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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(ios->power_mode == MMC_POWER_UP)) {
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dev_info(&host->pdev->dev,
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"powered (vdd = %d) clk: %lukHz div=%d (req: %ukHz). "
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- "Bus width=%d\n",ios->vdd,
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- host->real_rate / 1000, host->real_rate,
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- ios->clock / 1000, ios->bus_width);
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+ "Bus width=%d\n",(int)ios->vdd,
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+ host->real_rate / 1000, (int)host->clk_div,
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+ ios->clock / 1000, (int)ios->bus_width);
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} else
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dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
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@@ -800,11 +818,7 @@ static int glamo_mci_probe(struct platform_device *pdev)
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MMC_CAP_MMC_HIGHSPEED |
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MMC_CAP_SD_HIGHSPEED;
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mmc->f_min = host->clk_rate / 256;
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- /*
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- * held at /4 due to concerns of 100R recommended series resistor
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- * allows 16MHz @ 4-bit --> 8MBytes/sec raw
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- */
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- mmc->f_max = host->clk_rate / 3;
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+ mmc->f_max = sd_max_clk;
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mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
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mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
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@@ -866,12 +880,18 @@ static int glamo_mci_suspend(struct platform_device *dev, pm_message_t state)
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{
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struct mmc_host *mmc = platform_get_drvdata(dev);
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struct glamo_mci_host *host = mmc_priv(mmc);
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+ int ret;
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host->suspending++;
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if (host->pdata->mci_all_dependencies_resumed)
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(host->pdata->mci_suspending)(dev);
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- return mmc_suspend_host(mmc, state);
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+ ret = mmc_suspend_host(mmc, state);
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+
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+ /* so that when we resume, we use any modified max rate */
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+ mmc->f_max = sd_max_clk;
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+
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+ return ret;
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}
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int glamo_mci_resume(struct platform_device *dev)
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--
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1.5.6.3
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