mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-21 16:19:00 +03:00
369 lines
9.6 KiB
Diff
369 lines
9.6 KiB
Diff
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--- a/arch/arm/mach-omap2/board-n8x0.c
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+++ b/arch/arm/mach-omap2/board-n8x0.c
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@@ -24,6 +24,7 @@
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#include <linux/spi/spi.h>
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#include <linux/usb/musb.h>
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#include <sound/tlv320aic3x.h>
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+#include <linux/spi/tsc2005.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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@@ -43,6 +44,66 @@ static int slot1_cover_open;
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static int slot2_cover_open;
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static struct device *mmc_device;
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+#define RX51_TSC2005_RESET_GPIO 94
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+#define RX51_TSC2005_IRQ_GPIO 106
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+
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+#ifdef CONFIG_TOUCHSCREEN_TSC2005
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+static struct tsc2005_platform_data tsc2005_config;
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+static void rx51_tsc2005_set_reset(bool enable)
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+{
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+ gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
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+}
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+
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+static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
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+ .turbo_mode = 0,
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+ .single_channel = 1,
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+};
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+#endif
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+
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+static void __init tsc2005_set_config(void)
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+{
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+ const struct omap_lcd_config *conf;
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+
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+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
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+ if (conf != NULL) {
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+#ifdef CONFIG_TOUCHSCREEN_TSC2005
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+ if (strcmp(conf->panel_name, "lph8923") == 0) {
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+ tsc2005_config.ts_x_plate_ohm = 180;
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+ tsc2005_config.ts_pressure_max = 2048;
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+ tsc2005_config.ts_pressure_fudge = 2;
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+ tsc2005_config.ts_x_max = 4096;
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+ tsc2005_config.ts_x_fudge = 4;
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+ tsc2005_config.ts_y_max = 4096;
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+ tsc2005_config.ts_y_fudge = 7;
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+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
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+ } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
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+ tsc2005_config.ts_x_plate_ohm = 280;
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+ tsc2005_config.ts_pressure_max = 2048;
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+ tsc2005_config.ts_pressure_fudge = 2;
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+ tsc2005_config.ts_x_max = 4096;
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+ tsc2005_config.ts_x_fudge = 4;
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+ tsc2005_config.ts_y_max = 4096;
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+ tsc2005_config.ts_y_fudge = 7;
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+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
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+ } else {
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+ printk(KERN_ERR "Unknown panel type, set default "
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+ "touchscreen configuration\n");
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+ tsc2005_config.ts_x_plate_ohm = 200;
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+ }
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+#endif
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+ }
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+}
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+
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+static struct omap2_mcspi_device_config mipid_mcspi_config = {
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+ .turbo_mode = 0,
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+ .single_channel = 1,
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+};
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+
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+extern struct mipid_platform_data n8x0_mipid_platform_data;
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+
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+extern void n8x0_mipid_init(void);
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+extern void n8x0_blizzard_init(void);
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+
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#define TUSB6010_ASYNC_CS 1
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#define TUSB6010_SYNC_CS 4
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#define TUSB6010_GPIO_INT 58
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@@ -145,12 +206,29 @@ static struct omap2_mcspi_device_config
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static struct spi_board_info n800_spi_board_info[] __initdata = {
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{
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+ .modalias = "lcd_mipid",
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+ .bus_num = 1,
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+ .chip_select = 1,
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+ .max_speed_hz = 4000000,
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+ .controller_data= &mipid_mcspi_config,
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+ .platform_data = &n8x0_mipid_platform_data,
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+ },
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+ {
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.modalias = "p54spi",
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.bus_num = 2,
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.chip_select = 0,
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.max_speed_hz = 48000000,
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.controller_data = &p54spi_mcspi_config,
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},
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+ {
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+ .modalias = "tsc2005",
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+ .bus_num = 1,
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+ .chip_select = 0,
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+ .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
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+ .max_speed_hz = 6000000,
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+ .controller_data = &tsc2005_mcspi_config,
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+ .platform_data = &tsc2005_config,
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+ },
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};
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#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
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@@ -781,6 +859,7 @@ static void __init n8x0_init_machine(voi
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n8x0_cbus_init();
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/* FIXME: add n810 spi devices */
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+ tsc2005_set_config();
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spi_register_board_info(n800_spi_board_info,
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ARRAY_SIZE(n800_spi_board_info));
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omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
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@@ -790,6 +869,8 @@ static void __init n8x0_init_machine(voi
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i2c_register_board_info(2, n810_i2c_board_info_2,
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ARRAY_SIZE(n810_i2c_board_info_2));
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board_serial_init();
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+ n8x0_mipid_init();
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+ n8x0_blizzard_init();
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omap_sdrc_init(NULL, NULL);
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gpmc_onenand_init(board_onenand_data);
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n8x0_mmc_init();
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--- /dev/null
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+++ b/arch/arm/mach-omap2/board-n8x0-lcd.c
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@@ -0,0 +1,231 @@
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+/*
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+ * linux/arch/arm/mach-omap2/board-n8x0.c
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+ *
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+ * Copyright (C) 2005-2009 Nokia Corporation
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+ * Author: Juha Yrjola <juha.yrjola@nokia.com>
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+ *
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+ * Modified from mach-omap2/board-generic.c
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/delay.h>
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+#include <linux/gpio.h>
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+#include <linux/omapfb.h>
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+
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+#include <plat/lcd_mipid.h>
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+#include <plat/blizzard.h>
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+
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+#include "../../../drivers/cbus/tahvo.h"
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+
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+
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+struct tahvo_pwm_device {
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+ struct device *dev;
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+ int tahvo_7bit_backlight;
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+};
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+
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+static struct tahvo_pwm_device *tahvo_pwm;
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+
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+static unsigned int tahvo_pwm_get_backlight_level(struct tahvo_pwm_device *pd)
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+{
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+ unsigned int mask;
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+
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+ if (pd->tahvo_7bit_backlight)
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+ mask = 0x7f;
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+ else
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+ mask = 0x0f;
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+ return tahvo_read_reg(pd->dev, TAHVO_REG_LEDPWMR) & mask;
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+}
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+
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+static unsigned int tahvo_pwm_get_max_backlight_level(struct tahvo_pwm_device *pd)
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+{
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+ if (pd->tahvo_7bit_backlight)
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+ return 0x7f;
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+ return 0x0f;
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+}
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+
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+static void tahvo_pwm_set_backlight_level(struct tahvo_pwm_device *pd, unsigned int level)
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+{
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+ unsigned int max_level;
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+
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+ max_level = tahvo_pwm_get_max_backlight_level(pd);
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+ if (level > max_level)
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+ level = max_level;
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+ tahvo_write_reg(pd->dev, TAHVO_REG_LEDPWMR, level);
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+}
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+
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+static int __init n8x0_tahvo_pwm_probe(struct platform_device *pdev)
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+{
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+ struct tahvo_pwm_device *pd;
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+ unsigned int rev, id;
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+
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+ pd = kzalloc(sizeof(*pd), GFP_KERNEL);
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+ if (WARN_ON(!pd))
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+ return -ENOMEM;
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+ pd->dev = &pdev->dev;
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+
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+ rev = tahvo_read_reg(pd->dev, TAHVO_REG_ASICR);
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+ id = (rev >> 8) & 0xff;
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+ if (id == 0x03) {
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+ if ((rev & 0xff) >= 0x50)
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+ pd->tahvo_7bit_backlight = 1;
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+ } else if (id == 0x0b)
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+ pd->tahvo_7bit_backlight = 1;
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+
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+ dev_set_drvdata(pd->dev, pd);
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+ tahvo_pwm = pd;
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+
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+ return 0;
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+}
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+
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+static struct platform_driver n8x0_tahvo_pwm_driver = {
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+ .driver = {
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+ .name = "tahvo-pwm",
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+ },
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+};
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+
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+static int __init n8x0_tahvo_pwm_init(void)
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+{
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+ return platform_driver_probe(&n8x0_tahvo_pwm_driver, n8x0_tahvo_pwm_probe);
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+}
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+fs_initcall(n8x0_tahvo_pwm_init);
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+
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+static int n8x0_get_backlight_level(struct mipid_platform_data *pdata)
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+{
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+ return tahvo_pwm_get_backlight_level(tahvo_pwm);
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+}
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+
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+static int n8x0_get_max_backlight_level(struct mipid_platform_data *pdata)
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+{
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+ return tahvo_pwm_get_max_backlight_level(tahvo_pwm);
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+}
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+
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+static void n8x0_set_backlight_level(struct mipid_platform_data *pdata, int level)
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+{
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+ tahvo_pwm_set_backlight_level(tahvo_pwm, level);
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+}
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+
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+#define N8X0_BLIZZARD_POWERDOWN_GPIO 15
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+
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+// MIPID LCD Panel
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+
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+static void mipid_shutdown(struct mipid_platform_data *pdata)
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+{
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+ if (pdata->nreset_gpio != -1) {
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+ pr_info("shutdown LCD\n");
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+ gpio_set_value(pdata->nreset_gpio, 0);
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+ msleep(120);
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+ }
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+}
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+
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+struct mipid_platform_data n8x0_mipid_platform_data = {
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+ .shutdown = mipid_shutdown,
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+ .get_bklight_level = n8x0_get_backlight_level,
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+ .set_bklight_level = n8x0_set_backlight_level,
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+ .get_bklight_max = n8x0_get_max_backlight_level,
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+};
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+
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+void __init n8x0_mipid_init(void)
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+{
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+ const struct omap_lcd_config *conf;
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+ int err;
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+
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+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
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+ if (conf != NULL) {
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+ n8x0_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
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+ n8x0_mipid_platform_data.data_lines = conf->data_lines;
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+ if (conf->nreset_gpio != -1) {
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+ err = gpio_request(conf->nreset_gpio, "MIPID nreset");
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+ if (err) {
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+ printk(KERN_ERR "N8x0 MIPID failed to request nreset GPIO %d\n",
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+ conf->nreset_gpio);
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+ } else {
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+ err = gpio_direction_output(conf->nreset_gpio, 1);
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+ if (err) {
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+ printk(KERN_ERR "N8x0 MIPID failed to set nreset GPIO %d\n",
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+ conf->nreset_gpio);
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+ }
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+ }
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+ }
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+ printk(KERN_INFO "N8x0 MIPID config loaded");
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+ }
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+ else
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+ printk(KERN_INFO "N8x0 MIPID config not provided");
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+}
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+
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+
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+// Epson Blizzard LCD Controller
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+
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+static struct {
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+ struct clk *sys_ck;
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+} blizzard;
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+
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+static int blizzard_get_clocks(void)
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+{
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+ blizzard.sys_ck = clk_get(0, "osc_ck");
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+ if (IS_ERR(blizzard.sys_ck)) {
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+ printk(KERN_ERR "can't get Blizzard clock\n");
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+ return PTR_ERR(blizzard.sys_ck);
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+ }
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+ return 0;
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+}
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+
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+static unsigned long blizzard_get_clock_rate(struct device *dev)
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+{
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+ return clk_get_rate(blizzard.sys_ck);
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+}
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+
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+static void blizzard_enable_clocks(int enable)
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+{
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+ if (enable)
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+ clk_enable(blizzard.sys_ck);
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+ else
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+ clk_disable(blizzard.sys_ck);
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+}
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+
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+static void blizzard_power_up(struct device *dev)
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+{
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+ /* Vcore to 1.475V */
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+ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0, 0xf);
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+ msleep(10);
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+
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+ blizzard_enable_clocks(1);
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+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
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+}
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+
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+static void blizzard_power_down(struct device *dev)
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+{
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+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 0);
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+ blizzard_enable_clocks(0);
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+
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+ /* Vcore to 1.005V */
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+ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0xf, 0);
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+}
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+
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+static struct blizzard_platform_data n8x0_blizzard_data = {
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+ .power_up = blizzard_power_up,
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+ .power_down = blizzard_power_down,
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+ .get_clock_rate = blizzard_get_clock_rate,
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+ .te_connected = 1,
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+};
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+
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+void __init n8x0_blizzard_init(void)
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+{
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+ int r;
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+
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+ r = gpio_request(N8X0_BLIZZARD_POWERDOWN_GPIO, "Blizzard pd");
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+ if (r < 0)
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+ {
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+ printk(KERN_ERR "Can't get N8x0 Blizzard powerdown GPIO %d\n", N8X0_BLIZZARD_POWERDOWN_GPIO);
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+ return;
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+ }
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+ gpio_direction_output(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
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+
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+ blizzard_get_clocks();
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+ omapfb_set_ctrl_platform_data(&n8x0_blizzard_data);
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+
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+ printk(KERN_INFO "N8x0 Blizzard initialized");
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+}
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--- a/arch/arm/mach-omap2/Makefile
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+++ b/arch/arm/mach-omap2/Makefile
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@@ -205,6 +205,7 @@ obj-$(CONFIG_MACH_OMAP3EVM) += board-om
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obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
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obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o
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obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
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+obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0-lcd.o
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obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \
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sdram-nokia.o
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obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
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