mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-12 14:12:48 +02:00
184 lines
4.5 KiB
Diff
184 lines
4.5 KiB
Diff
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--- a/arch/mips/bcm47xx/nvram.c
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+++ b/arch/mips/bcm47xx/nvram.c
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@@ -3,7 +3,7 @@
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*
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* Copyright (C) 2005 Broadcom Corporation
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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- * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de>
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+ * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@@ -23,69 +23,139 @@
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static char nvram_buf[NVRAM_SPACE];
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+static u32 find_nvram_size(u32 end)
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+{
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+ struct nvram_header *header;
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+ u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000};
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
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+ header = (struct nvram_header *)KSEG1ADDR(end - nvram_sizes[i]);
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+ if (header->magic == NVRAM_HEADER)
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+ return nvram_sizes[i];
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+ }
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+
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+ return 0;
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+}
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+
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/* Probe for NVRAM header */
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-static void early_nvram_init(void)
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+static void early_nvram_init_fill(u32 base, u32 lim)
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{
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-#ifdef CONFIG_BCM47XX_SSB
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- struct ssb_mipscore *mcore_ssb;
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-#endif
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-#ifdef CONFIG_BCM47XX_BCMA
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- struct bcma_drv_cc *bcma_cc;
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-#endif
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struct nvram_header *header;
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int i;
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- u32 base = 0;
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- u32 lim = 0;
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u32 off;
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u32 *src, *dst;
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+ u32 size;
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- switch (bcm47xx_bus_type) {
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-#ifdef CONFIG_BCM47XX_SSB
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- case BCM47XX_BUS_TYPE_SSB:
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- mcore_ssb = &bcm47xx_bus.ssb.mipscore;
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- base = mcore_ssb->pflash.window;
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- lim = mcore_ssb->pflash.window_size;
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- break;
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-#endif
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-#ifdef CONFIG_BCM47XX_BCMA
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- case BCM47XX_BUS_TYPE_BCMA:
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- bcma_cc = &bcm47xx_bus.bcma.bus.drv_cc;
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- base = bcma_cc->pflash.window;
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- lim = bcma_cc->pflash.window_size;
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- break;
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-#endif
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- }
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-
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+ /* TODO: when nvram is on nand flash check for bad blocks first. */
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off = FLASH_MIN;
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while (off <= lim) {
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/* Windowed flash access */
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- header = (struct nvram_header *)
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- KSEG1ADDR(base + off - NVRAM_SPACE);
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- if (header->magic == NVRAM_HEADER)
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+ size = find_nvram_size(base + off);
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+ if (size) {
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+ header = (struct nvram_header *)KSEG1ADDR(base + off -
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+ size);
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goto found;
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+ }
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off <<= 1;
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}
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/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
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header = (struct nvram_header *) KSEG1ADDR(base + 4096);
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- if (header->magic == NVRAM_HEADER)
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+ if (header->magic == NVRAM_HEADER) {
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+ size = NVRAM_SPACE;
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goto found;
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+ }
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header = (struct nvram_header *) KSEG1ADDR(base + 1024);
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- if (header->magic == NVRAM_HEADER)
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+ if (header->magic == NVRAM_HEADER) {
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+ size = NVRAM_SPACE;
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goto found;
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+ }
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+ pr_err("no nvram found\n");
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return;
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found:
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+
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+ if (header->len > size)
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+ pr_err("The nvram size accoridng to the header seems to be bigger than the partition on flash\n");
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+ if (header->len > NVRAM_SPACE)
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+ pr_err("nvram on flash (%i bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
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+ header->len, NVRAM_SPACE);
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+
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src = (u32 *) header;
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dst = (u32 *) nvram_buf;
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for (i = 0; i < sizeof(struct nvram_header); i += 4)
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*dst++ = *src++;
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- for (; i < header->len && i < NVRAM_SPACE; i += 4)
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+ for (; i < header->len && i < NVRAM_SPACE && i < size; i += 4)
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*dst++ = le32_to_cpu(*src++);
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}
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+#ifdef CONFIG_BCM47XX_BCMA
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+static void early_nvram_init_bcma(void)
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+{
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+ struct bcma_drv_cc *cc = &bcm47xx_bus.bcma.bus.drv_cc;
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+ u32 base = 0;
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+ u32 lim = 0;
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+
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+ if (cc->nflash.boot) {
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+ base = BCMA_SOC_FLASH1;
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+ lim = BCMA_SOC_FLASH1_SZ;
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+ } else if (cc->pflash.present) {
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+ base = cc->pflash.window;
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+ lim = cc->pflash.window_size;
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+ } else if (cc->sflash.present) {
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+ base = cc->sflash.window;
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+ lim = cc->sflash.size;
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+ } else {
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+ pr_err("No supported flash found\n");
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+ return;
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+ }
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+
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+ early_nvram_init_fill(base, lim);
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+}
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+#endif
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+
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+#ifdef CONFIG_BCM47XX_SSB
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+static void early_nvram_init_ssb(void)
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+{
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+ struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
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+ struct ssb_chipcommon *chipco = &bcm47xx_bus.ssb.chipco;
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+ u32 base = 0;
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+ u32 lim = 0;
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+
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+ if (mcore->pflash.present) {
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+ base = mcore->pflash.window;
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+ lim = mcore->pflash.window_size;
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+ } else if (chipco->sflash.present) {
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+ base = chipco->sflash.window;
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+ lim = chipco->sflash.size;
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+ } else {
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+ pr_err("No supported flash found\n");
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+ return;
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+ }
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+
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+ early_nvram_init_fill(base, lim);
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+}
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+#endif
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+
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+static void early_nvram_init(void)
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+{
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+ switch (bcm47xx_bus_type) {
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+#ifdef CONFIG_BCM47XX_SSB
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+ case BCM47XX_BUS_TYPE_SSB:
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+ early_nvram_init_ssb();
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+ break;
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+#endif
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+#ifdef CONFIG_BCM47XX_BCMA
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+ case BCM47XX_BUS_TYPE_BCMA:
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+ early_nvram_init_bcma();
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+ break;
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+#endif
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+ }
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+}
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+
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int nvram_getenv(char *name, char *val, size_t val_len)
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{
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char *var, *value, *end, *eq;
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