mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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85 lines
2.4 KiB
Diff
85 lines
2.4 KiB
Diff
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From c2c9c788b91218bccbb9ac31539ffa577fe502bf Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 16 Aug 2012 08:09:20 +0000
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Subject: [PATCH 3/9] MIPS: lantiq: timer irq can be different to 7
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The SVIP SoC has its timer IRQ on a different IRQ than 7. Fix up the irq
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code to be able to handle this.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4229/
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---
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arch/mips/lantiq/irq.c | 19 ++++++++++++++++---
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1 file changed, 16 insertions(+), 3 deletions(-)
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diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
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index a2699a70..0cec43d 100644
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--- a/arch/mips/lantiq/irq.c
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+++ b/arch/mips/lantiq/irq.c
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@@ -84,6 +84,7 @@ static unsigned short ltq_eiu_irq[MAX_EIU] = {
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static int exin_avail;
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static void __iomem *ltq_icu_membase[MAX_IM];
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static void __iomem *ltq_eiu_membase;
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+static struct irq_domain *ltq_domain;
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void ltq_disable_irq(struct irq_data *d)
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{
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@@ -219,10 +220,14 @@ DEFINE_HWx_IRQDISPATCH(2)
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DEFINE_HWx_IRQDISPATCH(3)
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DEFINE_HWx_IRQDISPATCH(4)
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+#if MIPS_CPU_TIMER_IRQ == 7
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static void ltq_hw5_irqdispatch(void)
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{
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do_IRQ(MIPS_CPU_TIMER_IRQ);
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}
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+#else
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+DEFINE_HWx_IRQDISPATCH(5)
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+#endif
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#ifdef CONFIG_MIPS_MT_SMP
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void __init arch_init_ipiirq(int irq, struct irqaction *action)
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@@ -270,7 +275,7 @@ asmlinkage void plat_irq_dispatch(void)
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unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
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unsigned int i;
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- if (pending & CAUSEF_IP7) {
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+ if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
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do_IRQ(MIPS_CPU_TIMER_IRQ);
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goto out;
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} else {
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@@ -376,7 +381,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
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set_vi_handler(7, ltq_hw5_irqdispatch);
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}
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- irq_domain_add_linear(node,
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+ ltq_domain = irq_domain_add_linear(node,
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(MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE,
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&irq_domain_ops, 0);
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@@ -401,12 +406,20 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
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/* tell oprofile which irq to use */
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cp0_perfcount_irq = LTQ_PERF_IRQ;
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+
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+ /*
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+ * if the timer irq is not one of the mips irqs we need to
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+ * create a mapping
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+ */
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+ if (MIPS_CPU_TIMER_IRQ != 7)
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+ irq_create_mapping(ltq_domain, MIPS_CPU_TIMER_IRQ);
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+
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return 0;
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}
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unsigned int __cpuinit get_c0_compare_int(void)
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{
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- return CP0_LEGACY_COMPARE_IRQ;
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+ return MIPS_CPU_TIMER_IRQ;
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}
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static struct of_device_id __initdata of_irq_ids[] = {
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--
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1.7.10.4
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