mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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154 lines
4.1 KiB
C
154 lines
4.1 KiB
C
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/*
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* ALFA Network AP96 board support
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*
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* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/mmc_spi.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-spi.h"
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#include "dev-usb.h"
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#include "machtypes.h"
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#include "pci.h"
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#define ALFA_AP96_GPIO_PCIE_RESET 2
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#define ALFA_AP96_GPIO_SIM_DETECT 3
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#define ALFA_AP96_GPIO_MICROSD_CD 4
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#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5
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#define ALFA_AP96_GPIO_BUTTON_RESET 11
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#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */
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#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL)
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static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL,
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.gpio = ALFA_AP96_GPIO_BUTTON_RESET,
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.active_low = 1,
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}
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};
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static int alfa_ap96_mmc_get_cd(struct device *dev)
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{
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return !gpio_get_value(ALFA_AP96_GPIO_MICROSD_CD);
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}
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static struct mmc_spi_platform_data alfa_ap96_mmc_data = {
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.get_cd = alfa_ap96_mmc_get_cd,
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.caps = MMC_CAP_NEEDS_POLL,
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.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
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};
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static struct ath79_spi_controller_data ap96_spi0_cdata = {
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.cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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.cs_line = 0,
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};
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static struct ath79_spi_controller_data ap96_spi1_cdata = {
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.cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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.cs_line = 1,
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};
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static struct ath79_spi_controller_data ap96_spi2_cdata = {
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.cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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.cs_line = 2,
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};
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static struct spi_board_info alfa_ap96_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "m25p80",
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.controller_data = &ap96_spi0_cdata
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}, {
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.bus_num = 0,
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.chip_select = 1,
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.max_speed_hz = 25000000,
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.modalias = "mmc_spi",
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.platform_data = &alfa_ap96_mmc_data,
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.controller_data = &ap96_spi1_cdata
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}, {
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.bus_num = 0,
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.chip_select = 2,
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.max_speed_hz = 6250000,
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.modalias = "rtc-pcf2123",
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.controller_data = &ap96_spi2_cdata
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},
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};
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static struct ath79_spi_platform_data alfa_ap96_spi_data = {
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.bus_num = 0,
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.num_chipselect = 3,
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};
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static void __init alfa_ap96_gpio_setup(void)
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{
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ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
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AR71XX_GPIO_FUNC_SPI_CS2_EN);
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gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD");
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gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD);
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gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset");
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gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1);
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gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable");
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gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1);
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}
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#define ALFA_AP96_WAN_PHYMASK BIT(4)
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#define ALFA_AP96_LAN_PHYMASK BIT(5)
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#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK)
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static void __init alfa_ap96_init(void)
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{
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alfa_ap96_gpio_setup();
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ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK);
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ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK;
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ath79_eth1_pll_data.pll_1000 = 0x110000;
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ath79_register_eth(0);
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ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK;
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ath79_eth1_pll_data.pll_1000 = 0x110000;
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ath79_register_eth(1);
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ath79_register_pci();
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ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info,
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ARRAY_SIZE(alfa_ap96_spi_info));
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ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(alfa_ap96_gpio_keys),
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alfa_ap96_gpio_keys);
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ath79_register_usb();
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}
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MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96",
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alfa_ap96_init);
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