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103 lines
2.4 KiB
C
103 lines
2.4 KiB
C
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/*
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* Atheros PB92 board support
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*
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* Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-ath79/ath79.h>
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "machtypes.h"
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#include "pci.h"
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static struct mtd_partition pb92_partitions[] = {
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{
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.name = "u-boot",
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.offset = 0,
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.size = 0x040000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "u-boot-env",
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.offset = 0x040000,
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.size = 0x010000,
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}, {
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.name = "rootfs",
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.offset = 0x050000,
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.size = 0x2b0000,
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}, {
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.name = "uImage",
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.offset = 0x300000,
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.size = 0x0e0000,
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}, {
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.name = "ART",
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.offset = 0x3e0000,
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.size = 0x020000,
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.mask_flags = MTD_WRITEABLE,
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}
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};
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static struct flash_platform_data pb92_flash_data = {
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.parts = pb92_partitions,
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.nr_parts = ARRAY_SIZE(pb92_partitions),
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};
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#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */
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#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL)
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#define PB92_GPIO_BTN_SW4 8
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#define PB92_GPIO_BTN_SW5 3
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static struct gpio_keys_button pb92_gpio_keys[] __initdata = {
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{
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.desc = "sw4",
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.type = EV_KEY,
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.code = BTN_0,
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.debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
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.gpio = PB92_GPIO_BTN_SW4,
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.active_low = 1,
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}, {
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.desc = "sw5",
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.type = EV_KEY,
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.code = BTN_1,
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.debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
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.gpio = PB92_GPIO_BTN_SW5,
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.active_low = 1,
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}
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};
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static void __init pb92_init(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(&pb92_flash_data);
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ath79_register_mdio(0, ~BIT(0));
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.speed = SPEED_1000;
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_register_eth(0);
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ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(pb92_gpio_keys),
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pb92_gpio_keys);
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ath79_register_pci();
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}
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MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init);
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