mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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174 lines
4.0 KiB
C
174 lines
4.0 KiB
C
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/*
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* linux/include/asm-mips/mach-jz4740/clock.h
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*
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* JZ4740 clocks definition.
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*
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* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
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*
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* Author: <lhhuang@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4740_CLOCK_H__
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#define __ASM_JZ4740_CLOCK_H__
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#ifndef JZ_EXTAL
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//#define JZ_EXTAL 3686400 /* 3.6864 MHz */
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#define JZ_EXTAL 12000000 /* 3.6864 MHz */
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#endif
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#ifndef JZ_EXTAL2
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#define JZ_EXTAL2 32768 /* 32.768 KHz */
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#endif
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/*
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* JZ4740 clocks structure
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*/
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typedef struct {
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unsigned int cclk; /* CPU clock */
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unsigned int hclk; /* System bus clock */
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unsigned int pclk; /* Peripheral bus clock */
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unsigned int mclk; /* Flash/SRAM/SDRAM clock */
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unsigned int lcdclk; /* LCDC module clock */
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unsigned int pixclk; /* LCD pixel clock */
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unsigned int i2sclk; /* AIC module clock */
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unsigned int usbclk; /* USB module clock */
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unsigned int mscclk; /* MSC module clock */
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unsigned int extalclk; /* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */
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unsigned int rtcclk; /* RTC clock for CPM,INTC,RTC,TCU,WDT */
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} jz_clocks_t;
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extern jz_clocks_t jz_clocks;
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/* PLL output frequency */
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static __inline__ unsigned int __cpm_get_pllout(void)
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{
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unsigned long m, n, no, pllout;
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unsigned long cppcr = REG_CPM_CPPCR;
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unsigned long od[4] = {1, 2, 2, 4};
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if ((cppcr & CPM_CPPCR_PLLEN) && !(cppcr & CPM_CPPCR_PLLBP)) {
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m = __cpm_get_pllm() + 2;
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n = __cpm_get_plln() + 2;
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no = od[__cpm_get_pllod()];
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pllout = ((JZ_EXTAL) / (n * no)) * m;
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} else
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pllout = JZ_EXTAL;
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return pllout;
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}
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/* PLL output frequency for MSC/I2S/LCD/USB */
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static __inline__ unsigned int __cpm_get_pllout2(void)
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{
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if (REG_CPM_CPCCR & CPM_CPCCR_PCS)
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return __cpm_get_pllout();
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else
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return __cpm_get_pllout()/2;
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}
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/* CPU core clock */
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static __inline__ unsigned int __cpm_get_cclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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return __cpm_get_pllout() / div[__cpm_get_cdiv()];
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}
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/* AHB system bus clock */
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static __inline__ unsigned int __cpm_get_hclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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return __cpm_get_pllout() / div[__cpm_get_hdiv()];
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}
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/* Memory bus clock */
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static __inline__ unsigned int __cpm_get_mclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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return __cpm_get_pllout() / div[__cpm_get_mdiv()];
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}
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/* APB peripheral bus clock */
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static __inline__ unsigned int __cpm_get_pclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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return __cpm_get_pllout() / div[__cpm_get_pdiv()];
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}
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/* LCDC module clock */
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static __inline__ unsigned int __cpm_get_lcdclk(void)
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{
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return __cpm_get_pllout2() / (__cpm_get_ldiv() + 1);
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}
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/* LCD pixel clock */
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static __inline__ unsigned int __cpm_get_pixclk(void)
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{
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return __cpm_get_pllout2() / (__cpm_get_pixdiv() + 1);
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}
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/* I2S clock */
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static __inline__ unsigned int __cpm_get_i2sclk(void)
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{
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if (REG_CPM_CPCCR & CPM_CPCCR_I2CS) {
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return __cpm_get_pllout2() / (__cpm_get_i2sdiv() + 1);
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}
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else {
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return JZ_EXTAL;
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}
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}
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/* USB clock */
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static __inline__ unsigned int __cpm_get_usbclk(void)
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{
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if (REG_CPM_CPCCR & CPM_CPCCR_UCS) {
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return __cpm_get_pllout2() / (__cpm_get_udiv() + 1);
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}
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else {
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return JZ_EXTAL;
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}
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}
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/* MSC clock */
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static __inline__ unsigned int __cpm_get_mscclk(void)
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{
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return __cpm_get_pllout2() / (__cpm_get_mscdiv() + 1);
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}
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/* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */
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static __inline__ unsigned int __cpm_get_extalclk(void)
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{
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return JZ_EXTAL;
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}
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/* RTC clock for CPM,INTC,RTC,TCU,WDT */
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static __inline__ unsigned int __cpm_get_rtcclk(void)
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{
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return JZ_EXTAL2;
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}
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/*
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* Output 24MHz for SD and 16MHz for MMC.
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*/
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static inline void __cpm_select_msc_clk(int sd)
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{
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unsigned int pllout2 = __cpm_get_pllout2();
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unsigned int div = 0;
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if (sd) {
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div = pllout2 / 24000000;
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}
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else {
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div = pllout2 / 16000000;
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}
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REG_CPM_MSCCDR = div - 1;
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}
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#endif /* __ASM_JZ4740_CLOCK_H__ */
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