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113 lines
4.2 KiB
Diff
113 lines
4.2 KiB
Diff
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From ddc092180bd24b34afdd6fd7cd48b77b55a5bd5e Mon Sep 17 00:00:00 2001
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From: Kurt Mahan <kmahan@freescale.com>
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Date: Tue, 24 Jun 2008 23:21:07 -0600
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Subject: [PATCH] Cleanup ACR mappings and document.
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LTIBName: mcfv4e-acr-cleanup
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Signed-off-by: Kurt Mahan <kmahan@freescale.com>
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---
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arch/m68k/coldfire/head.S | 81 +++++++++++++++++++++++++-------------------
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1 files changed, 46 insertions(+), 35 deletions(-)
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--- a/arch/m68k/coldfire/head.S
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+++ b/arch/m68k/coldfire/head.S
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@@ -53,52 +53,63 @@
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#define __FINIT .previous
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#endif
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-/* JKM -- REVISE DOCS FOR M547x_8x and PHYS MAPPING */
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+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
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/*
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- * Setup ACR mappings to provide the following memory map:
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- * Data
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- * 0xA0000000 -> 0xAFFFFFFF [0] NO CACHE / PRECISE / SUPER ONLY
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- * 0xF0000000 -> 0xFFFFFFFF [1] NO CACHE / PRECISE / SUPER ONLY
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- * Code
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- * None currently (mapped via TLBs)
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+ * Kernel mapped to virtual ram address.
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+ *
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+ * M5445x:
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+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
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+ * Data[1]: 0xA0000000 -> 0xAFFFFFFF PCI
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+ * Code[0]: Not Mapped
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+ * Code[1]: Not Mapped
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+ *
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+ * M547x/M548x
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+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
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+ * Data[1]: Not Mapped
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+ * Code[0]: Not Mapped
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+ * Code[1]: Not Mapped
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*/
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-
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-#if CONFIG_SDRAM_BASE != PAGE_OFFSET
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#if defined(CONFIG_M5445X)
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-#if 0
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-#define ACR0_DEFAULT #0xA00FA048 /* ACR0 default value */
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-#endif
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-#define ACR0_DEFAULT #0x400FA028 /* ACR0 default value */
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-#define ACR1_DEFAULT #0xF00FA040 /* ACR1 default value */
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-#if 0
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-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
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-#endif
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-#define ACR2_DEFAULT #0x400FA028 /* ACR2 default value */
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-#define ACR3_DEFAULT #0x00000000 /* ACR3 default value */
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-/* ACR mapping for FPGA (maps 0) */
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-#define ACR0_FPGA #0x000FA048 /* ACR0 enable FPGA */
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+#define ACR0_DEFAULT #0xF00FA048 /* System regs */
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+#define ACR1_DEFAULT #0xA00FA048 /* PCI */
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+#define ACR2_DEFAULT #0x00000000 /* Not Mapped */
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+#define ACR3_DEFAULT #0x00000000 /* Not Mapped */
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#elif defined(CONFIG_M547X_8X)
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-#define ACR0_DEFAULT #0xE000C040 /* ACR0 default value */
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-#define ACR1_DEFAULT #0x00000000 /* ACR1 default value */
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-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
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-#define ACR3_DEFAULT #0x00000000 /* ACR3 default value */
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+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */
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+#define ACR1_DEFAULT #0x00000000 /* Not Mapped */
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+#define ACR2_DEFAULT #0x00000000 /* Not Mapped */
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+#define ACR3_DEFAULT #0x00000000 /* Not Mapped */
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#endif
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-#else
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+#else /* CONFIG_SDRAM_BASE = PAGE_OFFSET */
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+/*
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+ * Kernel mapped to physical ram address.
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+ *
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+ * M5445x:
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+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
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+ * Data[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - uncached
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+ * Code[0]: Not Mapped
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+ * Code[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - cached
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+ *
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+ * M547x/M548x
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+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
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+ * Data[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - uncached
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+ * Code[0]: Not Mapped
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+ * Code[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - cached
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+ */
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#if defined(CONFIG_M5445X)
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-#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
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-#define ACR1_DEFAULT #0x400FA008 /* ACR1 default value */
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-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
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-#define ACR3_DEFAULT #0x400FA008 /* ACR3 default value */
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+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */
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+#define ACR1_DEFAULT #0x400FA048 /* SDRAM uncached */
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+#define ACR2_DEFAULT #0x00000000 /* Not mapped */
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+#define ACR3_DEFAULT #0x400FA008 /* SDRAM cached */
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#elif defined(CONFIG_M547X_8X)
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-#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
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-#define ACR1_DEFAULT #0x000FA008 /* ACR1 default value */
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-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
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-#define ACR3_DEFAULT #0x000FA008 /* ACR3 default value */
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+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */
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+#define ACR1_DEFAULT #0x000FA048 /* SDRAM uncached */
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+#define ACR2_DEFAULT #0x00000000 /* Not mapped */
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+#define ACR3_DEFAULT #0x000FA008 /* SDRAM cached */
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#endif
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#endif
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-
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/* Several macros to make the writing of subroutines easier:
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* - func_start marks the beginning of the routine which setups the frame
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* register and saves the registers, it also defines another macro
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