2009-03-25 03:26:36 +02:00
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--- a/ath/if_ath.c
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+++ b/ath/if_ath.c
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2009-05-31 05:25:32 +03:00
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@@ -2308,6 +2308,17 @@ ath_intr(int irq, void *dev_id, struct p
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2009-03-25 03:26:36 +02:00
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sc->sc_isr = status;
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status &= sc->sc_imask; /* discard unasked for bits */
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+
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+ /* Treat RXORN as non-fatal. Either the bus is busy or the CPU
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+ * is not fast enough to process all frames. Treat it like
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+ * an Rx interrupt
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+ */
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+ if (status & HAL_INT_RXORN) {
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+ sc->sc_stats.ast_rxorn++;
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+ status &= ~HAL_INT_RXORN;
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+ status |= HAL_INT_RX;
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+ }
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+
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/* As soon as we know we have a real interrupt we intend to service,
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* we will check to see if we need an initial hardware TSF reading.
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* Normally we would just populate this all the time to keep things
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2009-05-31 05:25:32 +03:00
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@@ -2320,10 +2331,6 @@ ath_intr(int irq, void *dev_id, struct p
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2009-03-25 03:26:36 +02:00
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sc->sc_stats.ast_hardware++;
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ath_hal_intrset(ah, 0); /* disable intr's until reset */
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ATH_SCHEDULE_TQUEUE(&sc->sc_fataltq, &needmark);
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- } else if (status & HAL_INT_RXORN) {
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- sc->sc_stats.ast_rxorn++;
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- ath_hal_intrset(ah, 0); /* disable intr's until reset */
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- ATH_SCHEDULE_TQUEUE(&sc->sc_rxorntq, &needmark);
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} else {
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if (status & HAL_INT_SWBA) {
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struct ieee80211vap * vap;
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