mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-20 17:54:38 +03:00
358 lines
12 KiB
Diff
358 lines
12 KiB
Diff
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From f7df9a8f3ce3a600ceeb7302bf0de899f321c818 Mon Sep 17 00:00:00 2001
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From: Alison Wang <b18965@freescale.com>
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Date: Thu, 4 Aug 2011 09:59:45 +0800
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Subject: [PATCH 23/52] Replace readl and writel for FEC driver
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Replace readl and writel by fec_readl and fec_writel
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for FEC driver.
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Signed-off-by: Alison Wang <b18965@freescale.com>
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---
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drivers/net/fec.c | 129 ++++++++++++++++++++++++++++-------------------------
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1 files changed, 68 insertions(+), 61 deletions(-)
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--- a/drivers/net/fec.c
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+++ b/drivers/net/fec.c
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@@ -244,6 +244,11 @@ static void fec_stop(struct net_device *
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/* Transmitter timeout */
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#define TX_TIMEOUT (2 * HZ)
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+#define fec_readl(addr) \
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+ ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
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+#define fec_writel(b, addr) \
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+ (void)((*(volatile unsigned int *) (addr)) = (b))
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+
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static void *swap_buffer(void *bufaddr, int len)
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{
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int i;
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@@ -347,7 +352,7 @@ fec_enet_start_xmit(struct sk_buff *skb,
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bdp->cbd_sc = status;
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/* Trigger transmission start */
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- writel(0, fep->hwp + FEC_X_DES_ACTIVE);
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+ fec_writel(0, fep->hwp + FEC_X_DES_ACTIVE);
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/* If this was the last BD in the ring, start at the beginning again. */
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if (status & BD_ENET_TX_WRAP)
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@@ -390,8 +395,8 @@ fec_enet_interrupt(int irq, void * dev_i
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irqreturn_t ret = IRQ_NONE;
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do {
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- int_events = readl(fep->hwp + FEC_IEVENT);
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- writel(int_events, fep->hwp + FEC_IEVENT);
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+ int_events = fec_readl(fep->hwp + FEC_IEVENT);
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+ fec_writel(int_events, fep->hwp + FEC_IEVENT);
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#ifdef CONFIG_FEC_1588
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if (__raw_readb(MCF_DTIM1_DTER) & MCF_DTIM_DTER_REF)
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@@ -646,7 +651,7 @@ rx_processing_done:
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* incoming frames. On a heavily loaded network, we should be
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* able to keep up at the expense of system resources.
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*/
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- writel(0, fep->hwp + FEC_R_DES_ACTIVE);
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+ fec_writel(0, fep->hwp + FEC_R_DES_ACTIVE);
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}
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fep->cur_rx = bdp;
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@@ -686,9 +691,9 @@ static void __inline__ fec_get_mac(struc
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*/
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if (!is_valid_ether_addr(iap)) {
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*((unsigned long *) &tmpaddr[0]) =
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- be32_to_cpu(readl(fep->hwp + FEC_ADDR_LOW));
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+ be32_to_cpu(fec_readl(fep->hwp + FEC_ADDR_LOW));
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*((unsigned short *) &tmpaddr[4]) =
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- be16_to_cpu(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
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+ be16_to_cpu(fec_readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
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iap = &tmpaddr[0];
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}
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@@ -740,9 +745,9 @@ static void fec_enet_adjust_link(struct
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if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
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#ifdef CONFIG_FEC_1588
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- writel(0x00000012, fep->hwp + FEC_ECNTRL);
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+ fec_writel(0x00000012, fep->hwp + FEC_ECNTRL);
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#else
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- writel(0x00000002, fep->hwp + FEC_ECNTRL);
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+ fec_writel(0x00000002, fep->hwp + FEC_ECNTRL);
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#endif
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status_change = 1;
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}
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@@ -763,7 +768,7 @@ static int fec_enet_mdio_read(struct mii
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init_completion(&fep->mdio_done);
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/* start a read op */
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- writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
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+ fec_writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
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FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
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FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
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@@ -777,7 +782,7 @@ static int fec_enet_mdio_read(struct mii
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}
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/* return value */
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- return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
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+ return FEC_MMFR_DATA(fec_readl(fep->hwp + FEC_MII_DATA));
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}
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static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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@@ -790,7 +795,7 @@ static int fec_enet_mdio_write(struct mi
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init_completion(&fep->mdio_done);
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/* start a write op */
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- writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
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+ fec_writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
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FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
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FEC_MMFR_TA | FEC_MMFR_DATA(value),
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fep->hwp + FEC_MII_DATA);
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@@ -905,7 +910,7 @@ static int fec_enet_mii_init(struct plat
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* Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
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*/
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fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000) << 1;
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- writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
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+ fec_writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
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fep->mii_bus = mdiobus_alloc();
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if (fep->mii_bus == NULL) {
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@@ -1151,30 +1156,30 @@ static void set_multicast_list(struct ne
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unsigned char hash;
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if (dev->flags & IFF_PROMISC) {
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- tmp = readl(fep->hwp + FEC_R_CNTRL);
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+ tmp = fec_readl(fep->hwp + FEC_R_CNTRL);
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tmp |= 0x8;
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- writel(tmp, fep->hwp + FEC_R_CNTRL);
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+ fec_writel(tmp, fep->hwp + FEC_R_CNTRL);
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return;
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}
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- tmp = readl(fep->hwp + FEC_R_CNTRL);
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+ tmp = fec_readl(fep->hwp + FEC_R_CNTRL);
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tmp &= ~0x8;
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- writel(tmp, fep->hwp + FEC_R_CNTRL);
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+ fec_writel(tmp, fep->hwp + FEC_R_CNTRL);
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if (dev->flags & IFF_ALLMULTI) {
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/* Catch all multicast addresses, so set the
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* filter to all 1's
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*/
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- writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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- writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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+ fec_writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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+ fec_writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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return;
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}
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/* Clear filter and add the addresses in hash register
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*/
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- writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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- writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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+ fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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+ fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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netdev_for_each_mc_addr(ha, dev) {
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/* Only support group multicast for now */
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@@ -1198,13 +1203,13 @@ static void set_multicast_list(struct ne
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hash = (crc >> (32 - HASH_BITS)) & 0x3f;
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if (hash > 31) {
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- tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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+ tmp = fec_readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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tmp |= 1 << (hash - 32);
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- writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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+ fec_writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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} else {
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- tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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+ tmp = fec_readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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tmp |= 1 << hash;
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- writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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+ fec_writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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}
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}
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}
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@@ -1221,10 +1226,10 @@ fec_set_mac_address(struct net_device *d
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memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
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- writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
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+ fec_writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
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(dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24),
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fep->hwp + FEC_ADDR_LOW);
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- writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24),
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+ fec_writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24),
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fep->hwp + FEC_ADDR_HIGH);
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return 0;
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}
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@@ -1323,7 +1328,7 @@ fec_restart(struct net_device *dev, int
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u32 val, temp_mac[2];
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/* Whack a reset. We should wait for this. */
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- writel(1, fep->hwp + FEC_ECNTRL);
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+ fec_writel(1, fep->hwp + FEC_ECNTRL);
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udelay(10);
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/*
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@@ -1332,31 +1337,32 @@ fec_restart(struct net_device *dev, int
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*/
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if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
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memcpy(&temp_mac, dev->dev_addr, ETH_ALEN);
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- writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
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- writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
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+ fec_writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
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+ fec_writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
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}
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#ifdef CONFIG_FEC_1588
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- writel(0x7fff8000, fep->hwp + FEC_IEVENT);
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+ fec_writel(0x7fff8000, fep->hwp + FEC_IEVENT);
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#else
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/* Clear any outstanding interrupt. */
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- writel(0xffc00000, fep->hwp + FEC_IEVENT);
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+ fec_writel(0xffc00000, fep->hwp + FEC_IEVENT);
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#endif
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/* Reset all multicast. */
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- writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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- writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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+ fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
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+ fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
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#ifndef CONFIG_M5272
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- writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
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- writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
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+ fec_writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
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+ fec_writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
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#endif
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/* Set maximum receive buffer size. */
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- writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
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+ fec_writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
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/* Set receive and transmit descriptor base. */
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- writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
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- writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc) * RX_RING_SIZE,
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+ fec_writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
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+ fec_writel((unsigned long)fep->bd_dma +
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+ sizeof(struct bufdesc) * RX_RING_SIZE,
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fep->hwp + FEC_X_DES_START);
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fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
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@@ -1374,24 +1380,24 @@ fec_restart(struct net_device *dev, int
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/* Enable MII mode */
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if (duplex) {
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/* MII enable / FD enable */
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- writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
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- writel(0x04, fep->hwp + FEC_X_CNTRL);
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+ fec_writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
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+ fec_writel(0x04, fep->hwp + FEC_X_CNTRL);
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} else {
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/* MII enable / No Rcv on Xmit */
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- writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
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- writel(0x0, fep->hwp + FEC_X_CNTRL);
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+ fec_writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
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+ fec_writel(0x0, fep->hwp + FEC_X_CNTRL);
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}
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fep->full_duplex = duplex;
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/* Set MII speed */
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- writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
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+ fec_writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
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/*
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* The phy interface and speed need to get configured
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* differently on enet-mac.
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*/
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if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
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- val = readl(fep->hwp + FEC_R_CNTRL);
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+ val = fec_readl(fep->hwp + FEC_R_CNTRL);
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/* MII or RMII */
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if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
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@@ -1405,23 +1411,23 @@ fec_restart(struct net_device *dev, int
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else
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val |= (1 << 9);
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- writel(val, fep->hwp + FEC_R_CNTRL);
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+ fec_writel(val, fep->hwp + FEC_R_CNTRL);
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} else {
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#ifdef FEC_MIIGSK_ENR
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if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
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/* disable the gasket and wait */
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- writel(0, fep->hwp + FEC_MIIGSK_ENR);
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- while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
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+ fec_writel(0, fep->hwp + FEC_MIIGSK_ENR);
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+ while (fec_readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
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udelay(1);
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/*
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* configure the gasket:
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* RMII, 50 MHz, no loopback, no echo
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*/
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- writel(1, fep->hwp + FEC_MIIGSK_CFGR);
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+ fec_writel(1, fep->hwp + FEC_MIIGSK_CFGR);
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/* re-enable the gasket */
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- writel(2, fep->hwp + FEC_MIIGSK_ENR);
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+ fec_writel(2, fep->hwp + FEC_MIIGSK_ENR);
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}
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#endif
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}
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@@ -1433,22 +1439,22 @@ fec_restart(struct net_device *dev, int
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ret = fec_ptp_start(fep->ptp_priv);
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if (ret) {
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fep->ptimer_present = 0;
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- writel(2, fep->hwp + FEC_ECNTRL);
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+ fec_writel(2, fep->hwp + FEC_ECNTRL);
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} else {
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- val = readl(fep->hwp + FEC_ECNTRL);
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+ val = fec_readl(fep->hwp + FEC_ECNTRL);
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val |= 0x00000012;
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- writel(val, fep->hwp + FEC_ECNTRL);
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+ fec_writel(val, fep->hwp + FEC_ECNTRL);
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}
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} else
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- writel(2, fep->hwp + FEC_ECNTRL);
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+ fec_writel(2, fep->hwp + FEC_ECNTRL);
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#else
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/* And last, enable the transmit and receive processing */
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- writel(2, fep->hwp + FEC_ECNTRL);
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+ fec_writel(2, fep->hwp + FEC_ECNTRL);
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#endif
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- writel(0, fep->hwp + FEC_R_DES_ACTIVE);
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+ fec_writel(0, fep->hwp + FEC_R_DES_ACTIVE);
|
||
|
|
||
|
/* Enable interrupts we wish to service */
|
||
|
- writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
|
||
|
+ fec_writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
|
||
|
}
|
||
|
|
||
|
static void
|
||
|
@@ -1458,21 +1464,22 @@ fec_stop(struct net_device *dev)
|
||
|
|
||
|
/* We cannot expect a graceful transmit stop without link !!! */
|
||
|
if (fep->link) {
|
||
|
- writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
|
||
|
+ /* Graceful transmit stop */
|
||
|
+ fec_writel(1, fep->hwp + FEC_X_CNTRL);
|
||
|
udelay(10);
|
||
|
- if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
|
||
|
+ if (!(fec_readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
|
||
|
printk("fec_stop : Graceful transmit stop did not complete !\n");
|
||
|
}
|
||
|
|
||
|
/* Whack a reset. We should wait for this. */
|
||
|
- writel(1, fep->hwp + FEC_ECNTRL);
|
||
|
+ fec_writel(1, fep->hwp + FEC_ECNTRL);
|
||
|
udelay(10);
|
||
|
- writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
|
||
|
+ fec_writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
|
||
|
#ifdef CONFIG_FEC_1588
|
||
|
if (fep->ptimer_present)
|
||
|
fec_ptp_stop(fep->ptp_priv);
|
||
|
#endif
|
||
|
- writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
|
||
|
+ fec_writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
|
||
|
}
|
||
|
|
||
|
static int __devinit
|