2007-07-11 13:47:25 +03:00
|
|
|
diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig
|
|
|
|
|
--- linux-2.6.22/arch/mips/Kconfig 2007-07-09 01:32:17.000000000 +0200
|
|
|
|
|
+++ linux-2.6.22.new/arch/mips/Kconfig 2007-07-11 02:34:51.000000000 +0200
|
2007-08-18 17:50:00 +03:00
|
|
|
@@ -15,6 +15,20 @@
|
2007-07-11 13:47:25 +03:00
|
|
|
prompt "System type"
|
|
|
|
|
default SGI_IP22
|
|
|
|
|
|
|
|
|
|
+config AR7
|
|
|
|
|
+ bool "Texas Instruments AR7"
|
|
|
|
|
+ select BOOT_ELF32
|
|
|
|
|
+ select DMA_NONCOHERENT
|
|
|
|
|
+ select HW_HAS_PCI
|
|
|
|
|
+ select IRQ_CPU
|
|
|
|
|
+ select SWAP_IO_SPACE
|
|
|
|
|
+ select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
|
+ select SYS_HAS_EARLY_PRINTK
|
|
|
|
|
+ select SYS_SUPPORTS_32BIT_KERNEL
|
2007-07-27 06:07:52 +03:00
|
|
|
+ select SYS_SUPPORTS_KGDB
|
2007-07-11 13:47:25 +03:00
|
|
|
+ select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
+ select GENERIC_GPIO
|
|
|
|
|
+
|
|
|
|
|
config MACH_ALCHEMY
|
|
|
|
|
bool "Alchemy processor based machines"
|
|
|
|
|
|
|
|
|
|
diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c
|
|
|
|
|
--- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200
|
|
|
|
|
+++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200
|
|
|
|
|
@@ -1051,11 +1051,6 @@
|
|
|
|
|
unsigned long exception_handlers[32];
|
|
|
|
|
unsigned long vi_handlers[64];
|
|
|
|
|
|
|
|
|
|
-/*
|
|
|
|
|
- * As a side effect of the way this is implemented we're limited
|
|
|
|
|
- * to interrupt handlers in the address range from
|
|
|
|
|
- * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ...
|
|
|
|
|
- */
|
|
|
|
|
void *set_except_vector(int n, void *addr)
|
|
|
|
|
{
|
|
|
|
|
unsigned long handler = (unsigned long) addr;
|
|
|
|
|
@@ -1063,9 +1058,15 @@
|
|
|
|
|
|
|
|
|
|
exception_handlers[n] = handler;
|
|
|
|
|
if (n == 0 && cpu_has_divec) {
|
|
|
|
|
- *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
|
|
|
|
|
- (0x03ffffff & (handler >> 2));
|
|
|
|
|
- flush_icache_range(ebase + 0x200, ebase + 0x204);
|
|
|
|
|
+ /* lui k0, 0x0000 */
|
|
|
|
|
+ *(volatile u32 *)(CAC_BASE+0x200) = 0x3c1a0000 | (handler >> 16);
|
|
|
|
|
+ /* ori k0, 0x0000 */
|
|
|
|
|
+ *(volatile u32 *)(CAC_BASE+0x204) = 0x375a0000 | (handler & 0xffff);
|
|
|
|
|
+ /* jr k0 */
|
|
|
|
|
+ *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008;
|
|
|
|
|
+ /* nop */
|
|
|
|
|
+ *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000;
|
|
|
|
|
+ flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210);
|
|
|
|
|
}
|
|
|
|
|
return (void *)old_handler;
|
|
|
|
|
}
|
|
|
|
|
diff -urN linux-2.6.22/arch/mips/Makefile linux-2.6.22.new/arch/mips/Makefile
|
|
|
|
|
--- linux-2.6.22/arch/mips/Makefile 2007-07-09 01:32:17.000000000 +0200
|
|
|
|
|
+++ linux-2.6.22.new/arch/mips/Makefile 2007-07-11 02:32:39.000000000 +0200
|
|
|
|
|
@@ -158,6 +158,13 @@
|
|
|
|
|
#
|
|
|
|
|
|
|
|
|
|
#
|
|
|
|
|
+# Texas Instruments AR7
|
|
|
|
|
+#
|
|
|
|
|
+core-$(CONFIG_AR7) += arch/mips/ar7/
|
|
|
|
|
+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
|
|
|
|
|
+load-$(CONFIG_AR7) += 0xffffffff94100000
|
|
|
|
|
+
|
|
|
|
|
+#
|
|
|
|
|
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
|
|
|
|
|
#
|
|
|
|
|
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
|
