mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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230 lines
5.0 KiB
C
230 lines
5.0 KiB
C
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/*
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* Copyright (C) 2008 I2SE GmbH
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* Copyright (C) 2010 IEQualize GmbH
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* Copyright (C) 2010-2011 Michael Heimpold
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/fb.h>
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#include <mach/hardware.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/board.h>
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#include <mach/gpio.h>
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#include <mach/at91sam9_smc.h>
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#include <video/atmel_lcdc.h>
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#include "sam9_smc.h"
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#include "generic.h"
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#include <linux/atmel_serial.h>
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static void __init tqma9263_map_io(void)
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{
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unsigned pins;
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/* Initialize processor: 18.432 MHz crystal */
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at91sam9263_initialize(18432000);
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/* DGBU on ttyS0. (Rx & Tx only) */
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at91_register_uart(0, 0, 0);
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/* USART0 on ttyS1 */
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pins = ATMEL_UART_CTS | ATMEL_UART_RTS |
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ATMEL_UART_DSR | ATMEL_UART_DTR |
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ATMEL_UART_DCD | ATMEL_UART_RI;
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at91_register_uart(AT91SAM9263_ID_US0, 1, pins);
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/* USART1 on ttyS2 */
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pins = ATMEL_UART_RTS;
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at91_register_uart(AT91SAM9263_ID_US1, 2, pins);
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/* USART2 on ttyS3 */
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pins = ATMEL_UART_RTS;
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at91_register_uart(AT91SAM9263_ID_US2, 3, pins);
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/* set serial console to ttyS0 (ie, DBGU) */
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at91_set_serial_console(0);
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}
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static void __init tqma9263_init_irq(void)
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{
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at91sam9263_init_interrupts(NULL);
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}
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/*
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* USB Host port
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*/
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static struct at91_usbh_data __initdata tqma9263_usbh_data = {
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.ports = 2,
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.vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
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.vbus_active_high = 1,
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};
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/*
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* USB Device port
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*/
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static struct at91_udc_data __initdata tqma9263_udc_data = {
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.vbus_pin = AT91_PIN_PA25,
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.pullup_pin = 0, /* pull-up driven by UDC */
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};
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/*
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* MCI (SD/MMC)
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*/
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static struct at91_mmc_data __initdata tqma9263_mmc_data = {
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.wire4 = 1,
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.det_pin = AT91_PIN_PE18,
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.wp_pin = AT91_PIN_PB28,
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};
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/*
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* MACB Ethernet device
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*/
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static struct at91_eth_data __initdata tqma9263_macb_data = {
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.phy_irq_pin = AT91_PIN_PE31,
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.is_rmii = 1,
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};
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/*
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* I2C devices
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*/
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static struct i2c_board_info __initdata tqma9263_i2c_devices[] = {
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{
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I2C_BOARD_INFO("pcf8563", 0x51),
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},
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{
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I2C_BOARD_INFO("24c04", 0x52),
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},
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};
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/*
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* NAND flash
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*/
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static struct mtd_partition __initdata tqma9263_nand_partition[] = {
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{
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.name = "uboot",
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.offset = 0,
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.size = 3 * SZ_128K,
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},
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{
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.name = "uboot-env",
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.offset = MTDPART_OFS_NXTBLK,
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.size = SZ_128K,
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},
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{
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.name = "linux",
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.offset = MTDPART_OFS_NXTBLK,
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.size = SZ_2M,
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},
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
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{
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*num_partitions = ARRAY_SIZE(tqma9263_nand_partition);
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return tqma9263_nand_partition;
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}
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static struct atmel_nand_data __initdata tqma9263_nand_data = {
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.ale = 21,
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.cle = 22,
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.rdy_pin = AT91_PIN_PD14,
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.enable_pin = AT91_PIN_PD15,
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.partition_info = nand_partitions,
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};
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static struct sam9_smc_config __initdata tqma9263_nand_smc_config = {
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.ncs_read_setup = 0,
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.nrd_setup = 1,
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.ncs_write_setup = 0,
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.nwe_setup = 1,
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.ncs_read_pulse = 3,
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.nrd_pulse = 3,
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.ncs_write_pulse = 3,
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.nwe_pulse = 3,
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.read_cycle = 5,
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.write_cycle = 5,
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.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
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.tdf_cycles = 2,
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};
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static void __init tqma9263_add_device_nand(void)
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{
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/* configure chip-select 3 (NAND) */
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sam9_smc_configure(3, &tqma9263_nand_smc_config);
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at91_add_device_nand(&tqma9263_nand_data);
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}
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static void __init tqma9263_board_init(void)
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{
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/* Serial */
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at91_add_device_serial();
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/* USB Host */
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at91_add_device_usbh(&tqma9263_usbh_data);
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/* USB Device */
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at91_add_device_udc(&tqma9263_udc_data);
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/* MMC */
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at91_add_device_mmc(1, &tqma9263_mmc_data);
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/* I2C */
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at91_add_device_i2c(tqma9263_i2c_devices, ARRAY_SIZE(tqma9263_i2c_devices));
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/* Ethernet */
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at91_add_device_eth(&tqma9263_macb_data);
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/* NAND flash */
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tqma9263_add_device_nand();
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}
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MACHINE_START(TQMA9263, "TQ Components TQMa9263")
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/* Maintainer: Michael Heimpold */
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.phys_io = AT91_BASE_SYS,
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.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
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.boot_params = AT91_SDRAM_BASE + 0x100,
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.timer = &at91sam926x_timer,
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.map_io = tqma9263_map_io,
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.init_irq = tqma9263_init_irq,
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.init_machine = tqma9263_board_init,
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MACHINE_END
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