mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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403 lines
11 KiB
Diff
403 lines
11 KiB
Diff
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From 0a1a5fd8aab864e7b531ab88fd317ff7278d884d Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Mon, 6 Jun 2011 00:07:32 +0200
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Subject: [PATCH 05/14] bcma: add mips driver
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This adds a mips driver to bcma. This is only found on embedded
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devices. For now the driver just initializes the irqs used on this
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system.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/Kconfig | 11 ++-
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drivers/bcma/Makefile | 1 +
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drivers/bcma/driver_mips.c | 234 +++++++++++++++++++++++++++++++++
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drivers/bcma/main.c | 19 +++
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include/linux/bcma/bcma.h | 2 +
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include/linux/bcma/bcma_driver_mips.h | 49 +++++++
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6 files changed, 315 insertions(+), 1 deletions(-)
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create mode 100644 drivers/bcma/driver_mips.c
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create mode 100644 include/linux/bcma/bcma_driver_mips.h
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--- a/drivers/bcma/Kconfig
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+++ b/drivers/bcma/Kconfig
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@@ -29,9 +29,18 @@ config BCMA_HOST_PCI
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config BCMA_HOST_SOC
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bool
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- depends on BCMA && MIPS
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+ depends on BCMA_DRIVER_MIPS
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default n
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+config BCMA_DRIVER_MIPS
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+ bool "BCMA Broadcom MIPS core driver"
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+ depends on BCMA && MIPS
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+ help
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+ Driver for the Broadcom MIPS core attached to Broadcom specific
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+ Advanced Microcontroller Bus.
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+
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+ If unsure, say N
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+
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config BCMA_DEBUG
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bool "BCMA debugging"
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depends on BCMA
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--- a/drivers/bcma/Makefile
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+++ b/drivers/bcma/Makefile
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@@ -1,6 +1,7 @@
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bcma-y += main.o scan.o core.o sprom.o
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bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o
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bcma-y += driver_pci.o
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+bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o
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bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
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bcma-$(CONFIG_BCMA_HOST_SOC) += host_soc.o
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obj-$(CONFIG_BCMA) += bcma.o
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--- /dev/null
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+++ b/drivers/bcma/driver_mips.c
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@@ -0,0 +1,234 @@
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+/*
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+ * Broadcom specific AMBA
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+ * Broadcom MIPS32 74K core driver
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+ *
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+ * Copyright 2009, Broadcom Corporation
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+ * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2010, Bernhard Loos <bernhardloos@googlemail.com>
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+ * Copyright 2011, Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+#include "bcma_private.h"
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+
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+#include <linux/bcma/bcma.h>
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+
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+#include <linux/serial.h>
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+#include <linux/serial_core.h>
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+#include <linux/serial_reg.h>
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+#include <linux/time.h>
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+
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+/* The 47162a0 hangs when reading its registers */
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+static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
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+{
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+ return dev->bus->chipinfo.id == 47162 && dev->bus->chipinfo.rev == 0 &&
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+ dev->id.id == BCMA_CORE_MIPS_74K;
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+}
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+
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+static inline u32 mips_read32(struct bcma_drv_mips *mcore,
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+ u16 offset)
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+{
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+ return bcma_read32(mcore->core, offset);
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+}
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+
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+static inline void mips_write32(struct bcma_drv_mips *mcore,
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+ u16 offset,
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+ u32 value)
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+{
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+ bcma_write32(mcore->core, offset, value);
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+}
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+
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+static const u32 ipsflag_irq_mask[] = {
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+ 0,
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+ BCMA_MIPS_IPSFLAG_IRQ1,
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+ BCMA_MIPS_IPSFLAG_IRQ2,
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+ BCMA_MIPS_IPSFLAG_IRQ3,
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+ BCMA_MIPS_IPSFLAG_IRQ4,
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+};
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+
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+static const u32 ipsflag_irq_shift[] = {
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+ 0,
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+ BCMA_MIPS_IPSFLAG_IRQ1_SHIFT,
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+ BCMA_MIPS_IPSFLAG_IRQ2_SHIFT,
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+ BCMA_MIPS_IPSFLAG_IRQ3_SHIFT,
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+ BCMA_MIPS_IPSFLAG_IRQ4_SHIFT,
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+};
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+
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+static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
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+{
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+ u32 flag;
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+
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+ if (bcma_core_mips_bcm47162a0_quirk(dev))
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+ return dev->core_index;
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+ flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
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+
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+ return flag & 0x1F;
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+}
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+
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+
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+/* Get the MIPS IRQ assignment for a specified device.
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+ * If unassigned, 0 is returned.
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+ * If disabled, 5 is returned.
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+ */
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+unsigned int bcma_core_mips_irq(struct bcma_device *dev)
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+{
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+ struct bcma_device *mdev = dev->bus->drv_mips.core;
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+ u32 irqflag;
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+ unsigned int irq;
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+
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+ irqflag = bcma_core_mips_irqflag(dev);
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+
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+ for (irq = 1; irq <= 4; irq++)
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+ if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
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+ (1 << irqflag))
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+ return irq;
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL(bcma_core_mips_irq);
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+
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+static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
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+{
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+ unsigned int oldirq = bcma_core_mips_irq(dev);
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+ struct bcma_bus *bus = dev->bus;
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+ struct bcma_device *mdev = bus->drv_mips.core;
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+ u32 irqflag;
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+
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+ irqflag = bcma_core_mips_irqflag(dev);
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+ BUG_ON(oldirq == 6);
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+
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+ dev->irq = irq + 2;
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+
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+ /* clear the old irq */
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+ if (oldirq == 0)
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+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
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+ bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) &
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+ ~(1 << irqflag));
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+ else
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+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq), 0);
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+
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+ /* assign the new one */
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+ if (irq == 0) {
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+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
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+ bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) |
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+ (1 << irqflag));
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+ } else {
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+ u32 oldirqflag = bcma_read32(mdev,
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+ BCMA_MIPS_MIPS74K_INTMASK(irq));
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+ if (oldirqflag) {
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+ struct bcma_device *core;
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+
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+ /* backplane irq line is in use, find out who uses
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+ * it and set user to irq 0
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+ */
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+ list_for_each_entry_reverse(core, &bus->cores, list) {
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+ if ((1 << bcma_core_mips_irqflag(core)) ==
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+ oldirqflag) {
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+ bcma_core_mips_set_irq(core, 0);
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+ break;
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+ }
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+ }
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+ }
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+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq),
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+ 1 << irqflag);
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+ }
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+
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+ pr_info("set_irq: core 0x%04x, irq %d => %d\n",
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+ dev->id.id, oldirq + 2, irq + 2);
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+}
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+
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+static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
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+{
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+ int i;
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+ static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
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+ printk(KERN_INFO KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
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+ for (i = 0; i <= 6; i++)
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+ printk(" %s%s", irq_name[i], i == irq ? "*" : " ");
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+ printk("\n");
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+}
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+
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+static void bcma_core_mips_dump_irq(struct bcma_bus *bus)
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+{
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+ struct bcma_device *core;
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+
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+ list_for_each_entry_reverse(core, &bus->cores, list) {
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+ bcma_core_mips_print_irq(core, bcma_core_mips_irq(core));
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+ }
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+}
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+
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+static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
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+{
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+ struct bcma_bus *bus = mcore->core->bus;
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+
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+ mcore->flash_buswidth = 2;
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+ if (bus->drv_cc.core) {
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+ mcore->flash_window = 0x1c000000;
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+ mcore->flash_window_size = 0x02000000;
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+ switch (bus->drv_cc.capabilities & BCMA_CC_CAP_FLASHT) {
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+ case BCMA_CC_FLASHT_STSER:
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+ case BCMA_CC_FLASHT_ATSER:
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+ pr_err("Serial flash not supported.\n");
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+ break;
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+ case BCMA_CC_FLASHT_PARA:
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+ if ((bcma_read32(bus->drv_cc.core, BCMA_CC_FLASH_CFG) &
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+ BCMA_CC_OTPS) == 0)
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+ mcore->flash_buswidth = 1;
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+ break;
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+ }
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+ } else {
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+ mcore->flash_window = 0x1fc00000;
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+ mcore->flash_window_size = 0x00400000;
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+ }
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+}
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+
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+void bcma_core_mips_init(struct bcma_drv_mips *mcore)
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+{
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+ struct bcma_bus *bus;
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+ struct bcma_device *core;
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+ bus = mcore->core->bus;
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+
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+ pr_info("Initializing MIPS core...\n");
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+
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+ if (!mcore->setup_done)
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+ mcore->assigned_irqs = 1;
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+
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+ /* Assign IRQs to all cores on the bus */
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+ list_for_each_entry_reverse(core, &bus->cores, list) {
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+ int mips_irq;
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+ if (core->irq)
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+ continue;
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+
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+ mips_irq = bcma_core_mips_irq(core);
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+ if (mips_irq > 4)
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+ core->irq = 0;
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+ else
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+ core->irq = mips_irq + 2;
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+ if (core->irq > 5)
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+ continue;
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+ switch (core->id.id) {
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+ case BCMA_CORE_PCI:
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+ case BCMA_CORE_PCIE:
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+ case BCMA_CORE_ETHERNET:
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+ case BCMA_CORE_ETHERNET_GBIT:
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+ case BCMA_CORE_MAC_GBIT:
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+ case BCMA_CORE_80211:
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+ case BCMA_CORE_USB20_HOST:
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+ /* These devices get their own IRQ line if available,
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+ * the rest goes on IRQ0
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+ */
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+ if (mcore->assigned_irqs <= 4)
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+ bcma_core_mips_set_irq(core,
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+ mcore->assigned_irqs++);
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+ break;
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+ }
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+ }
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+ pr_info("IRQ reconfiguration done\n");
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+ bcma_core_mips_dump_irq(bus);
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+
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+ if (mcore->setup_done)
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+ return;
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+
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+ bcma_core_mips_flash_detect(mcore);
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+ mcore->setup_done = true;
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+}
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--- a/drivers/bcma/main.c
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+++ b/drivers/bcma/main.c
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@@ -80,6 +80,7 @@ static int bcma_register_cores(struct bc
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case BCMA_CORE_CHIPCOMMON:
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case BCMA_CORE_PCI:
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case BCMA_CORE_PCIE:
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+ case BCMA_CORE_MIPS_74K:
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continue;
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}
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@@ -141,6 +142,15 @@ int bcma_bus_register(struct bcma_bus *b
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bcma_core_chipcommon_init(&bus->drv_cc);
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}
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+#ifdef CONFIG_BCMA_DRIVER_MIPS
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+ /* Init MIPS core */
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+ core = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
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+ if (core) {
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+ bus->drv_mips.core = core;
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+ bcma_core_mips_init(&bus->drv_mips);
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+ }
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+#endif
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+
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/* Init PCIE core */
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core = bcma_find_core(bus, BCMA_CORE_PCIE);
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if (core) {
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@@ -208,6 +218,15 @@ int __init bcma_bus_early_register(struc
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bcma_core_chipcommon_init(&bus->drv_cc);
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}
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+#ifdef CONFIG_BCMA_DRIVER_MIPS
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+ /* Init MIPS core */
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+ core = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
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+ if (core) {
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+ bus->drv_mips.core = core;
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+ bcma_core_mips_init(&bus->drv_mips);
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+ }
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+#endif
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+
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pr_info("Early bus registered\n");
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return 0;
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--- a/include/linux/bcma/bcma.h
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+++ b/include/linux/bcma/bcma.h
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@@ -6,6 +6,7 @@
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#include <linux/bcma/bcma_driver_chipcommon.h>
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#include <linux/bcma/bcma_driver_pci.h>
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+#include <linux/bcma/bcma_driver_mips.h>
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#include <linux/ssb/ssb.h> /* SPROM sharing */
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#include "bcma_regs.h"
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@@ -193,6 +194,7 @@ struct bcma_bus {
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struct bcma_drv_cc drv_cc;
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struct bcma_drv_pci drv_pci;
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+ struct bcma_drv_mips drv_mips;
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/* We decided to share SPROM struct with SSB as long as we do not need
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* any hacks for BCMA. This simplifies drivers code. */
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--- /dev/null
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+++ b/include/linux/bcma/bcma_driver_mips.h
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@@ -0,0 +1,49 @@
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+#ifndef LINUX_BCMA_DRIVER_MIPS_H_
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+#define LINUX_BCMA_DRIVER_MIPS_H_
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+
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+#define BCMA_MIPS_IPSFLAG 0x0F08
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+/* which sbflags get routed to mips interrupt 1 */
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+#define BCMA_MIPS_IPSFLAG_IRQ1 0x0000003F
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+#define BCMA_MIPS_IPSFLAG_IRQ1_SHIFT 0
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+/* which sbflags get routed to mips interrupt 2 */
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+#define BCMA_MIPS_IPSFLAG_IRQ2 0x00003F00
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+#define BCMA_MIPS_IPSFLAG_IRQ2_SHIFT 8
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+/* which sbflags get routed to mips interrupt 3 */
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+#define BCMA_MIPS_IPSFLAG_IRQ3 0x003F0000
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+#define BCMA_MIPS_IPSFLAG_IRQ3_SHIFT 16
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+/* which sbflags get routed to mips interrupt 4 */
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+#define BCMA_MIPS_IPSFLAG_IRQ4 0x3F000000
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+#define BCMA_MIPS_IPSFLAG_IRQ4_SHIFT 24
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+
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+/* MIPS 74K core registers */
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+#define BCMA_MIPS_MIPS74K_CORECTL 0x0000
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+#define BCMA_MIPS_MIPS74K_EXCEPTBASE 0x0004
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+#define BCMA_MIPS_MIPS74K_BIST 0x000C
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+#define BCMA_MIPS_MIPS74K_INTMASK_INT0 0x0014
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+#define BCMA_MIPS_MIPS74K_INTMASK(int) \
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+ ((int) * 4 + BCMA_MIPS_MIPS74K_INTMASK_INT0)
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+#define BCMA_MIPS_MIPS74K_NMIMASK 0x002C
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+#define BCMA_MIPS_MIPS74K_GPIOSEL 0x0040
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+#define BCMA_MIPS_MIPS74K_GPIOOUT 0x0044
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||
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+#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048
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||
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+#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0
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||
|
+
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||
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+#define BCMA_MIPS_OOBSELOUTA30 0x100
|
||
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+
|
||
|
+struct bcma_device;
|
||
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+
|
||
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+struct bcma_drv_mips {
|
||
|
+ struct bcma_device *core;
|
||
|
+ u8 setup_done:1;
|
||
|
+ unsigned int assigned_irqs;
|
||
|
+
|
||
|
+ u8 flash_buswidth;
|
||
|
+ u32 flash_window;
|
||
|
+ u32 flash_window_size;
|
||
|
+};
|
||
|
+
|
||
|
+extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
|
||
|
+
|
||
|
+extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
|
||
|
+
|
||
|
+#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
|